{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,24]],"date-time":"2025-08-24T00:04:35Z","timestamp":1755993875951,"version":"3.44.0"},"publisher-location":"New York, NY, USA","reference-count":25,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,4,8]],"date-time":"2024-04-08T00:00:00Z","timestamp":1712534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,4,8]]},"DOI":"10.1145\/3648115.3648134","type":"proceedings-article","created":{"date-parts":[[2024,4,5]],"date-time":"2024-04-05T18:25:24Z","timestamp":1712341524000},"page":"1-11","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Optimisation and Evaluation of Breadth First Search with oneAPI\/SYCL on Intel FPGAs: from Describing Algorithms to Describing Architectures"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0351-2055","authenticated-orcid":false,"given":"Kaan","family":"Olgu","sequence":"first","affiliation":[{"name":"School of Electrical &amp; Electronics Engineering, University of Bristol, United Kingdom"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5088-0267","authenticated-orcid":false,"given":"Tobias","family":"Kenter","sequence":"additional","affiliation":[{"name":"Paderborn Center for Parallel Computing &amp; Department of Computer Science, Paderborn University, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5153-5481","authenticated-orcid":false,"given":"Jose","family":"Nunez-Yanez","sequence":"additional","affiliation":[{"name":"Dept. Electrical Engineering, Linkoping University, Sweden"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5312-0378","authenticated-orcid":false,"given":"Simon","family":"Mcintosh-Smith","sequence":"additional","affiliation":[{"name":"School of Computer Science, University of Bristol, United Kingdom"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2024,4,8]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"2024. Graph 500 | large-scale benchmarks. Available at https:\/\/graph500.org\/ (2024\/01\/11)."},{"key":"e_1_3_2_1_2_1","volume-title":"Tal Ben-Nun, and Torsten Hoefler.","author":"Besta Maciej","year":"2019","unstructured":"Maciej Besta, Dimitri Stanojevic, Johannes De\u00a0Fine Licht, Tal Ben-Nun, and Torsten Hoefler. 2019. Graph Processing on FPGAs: Taxonomy, Survey, Challenges. (2019). http:\/\/arxiv.org\/abs\/1903.06697"},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM57271.2023.00042"},{"key":"e_1_3_2_1_4_1","unstructured":"BittWare. 2023. 520N PCIe Card with Intel Stratix 10 GX FPGA. https:\/\/www.bittware.com\/products\/520n\/"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2019.00020"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3431920.3439290"},{"key":"e_1_3_2_1_7_1","unstructured":"Chisel. 2024. Chisel Language. https:\/\/www.chisel-lang.org\/"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL57034.2022.00016"},{"key":"e_1_3_2_1_9_1","unstructured":"Advanced\u00a0Micro Devices. 2024. AMD Alveo U250 Board Specifications. https:\/\/www.xilinx.com\/products\/boards-and-kits\/alveo\/u250.html"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317802"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2014.23"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS54959.2023.00013"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL50879.2020.00032"},{"key":"e_1_3_2_1_14_1","unstructured":"Intel. [n. d.]. Intel oneAPI FPGA Handbook. https:\/\/www.intel.com\/content\/www\/us\/en\/docs\/oneapi-fpga-add-on\/developer-guide\/2024-0\/intel-oneapi-fpga-handbook.html"},{"key":"e_1_3_2_1_15_1","unstructured":"Intel. 2019. Intel\u00ae FPGA PAC D5005 Specifications. https:\/\/www.intel.com\/content\/www\/us\/en\/products\/sku\/193921\/intel-fpga-pac-d5005\/specifications.html"},{"key":"e_1_3_2_1_16_1","unstructured":"Intel. 2024. Intel oneAPI Samples Official Repository. https:\/\/github.com\/oneapi-src\/oneAPI-samples"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/3492805.3492817"},{"key":"e_1_3_2_1_18_1","unstructured":"Jure Leskovec and Andrej Krevl. 2014. SNAP Datasets: Stanford Large Network Dataset Collection. http:\/\/snap.stanford.edu\/data"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICFPT47387.2019.00056"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD57027.2022.00012"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1145\/3597031.3597050"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2983990.2984015"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2015.7293939"},{"key":"e_1_3_2_1_24_1","volume-title":"A computation of D(9) using FPGA Supercomputing. (4","author":"Van\u00a0Hirtum Lennart","year":"2023","unstructured":"Lennart Van\u00a0Hirtum, Patrick De\u00a0Causmaecker, Jens Goemaere, Tobias Kenter, Heinrich Riebler, Michael Lass, and Christian Plessl. 2023. A computation of D(9) using FPGA Supercomputing. (4 2023). http:\/\/arxiv.org\/abs\/2304.03039"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2019.2910068"}],"event":{"name":"IWOCL '24: International Workshop on OpenCL and SYCL","acronym":"IWOCL '24","location":"Chicago IL USA"},"container-title":["Proceedings of the 12th International Workshop on OpenCL and SYCL"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3648115.3648134","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3648115.3648134","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T02:26:53Z","timestamp":1755916013000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3648115.3648134"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,4,8]]},"references-count":25,"alternative-id":["10.1145\/3648115.3648134","10.1145\/3648115"],"URL":"https:\/\/doi.org\/10.1145\/3648115.3648134","relation":{},"subject":[],"published":{"date-parts":[[2024,4,8]]},"assertion":[{"value":"2024-04-08","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}