{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,22]],"date-time":"2026-03-22T22:42:25Z","timestamp":1774219345028,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":14,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,6,23]],"date-time":"2024-06-23T00:00:00Z","timestamp":1719100800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2023YFB4503400"],"award-info":[{"award-number":["2023YFB4503400"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002858","name":"China Postdoctoral Science Foundation","doi-asserted-by":"publisher","award":["023TQ0328"],"award-info":[{"award-number":["023TQ0328"]}],"id":[{"id":"10.13039\/501100002858","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002858","name":"China Postdoctoral Science Foundation","doi-asserted-by":"publisher","award":["2023M743256"],"award-info":[{"award-number":["2023M743256"]}],"id":[{"id":"10.13039\/501100002858","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Zhejiang Provincial Natural Science Foundation of China","award":["LQ24F020027"],"award-info":[{"award-number":["LQ24F020027"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,6,23]]},"DOI":"10.1145\/3649329.3655945","type":"proceedings-article","created":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T19:27:22Z","timestamp":1731007642000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["High-Performance and Resource-Efficient Dynamic Memory Management in High-Level Synthesis"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9951-3345","authenticated-orcid":false,"given":"Qinggang","family":"Wang","sequence":"first","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7903-2061","authenticated-orcid":false,"given":"Long","family":"Zheng","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-3011-6461","authenticated-orcid":false,"given":"Zhaozeng","family":"An","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-7278-1555","authenticated-orcid":false,"given":"Haoqin","family":"Huang","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-1110-6154","authenticated-orcid":false,"given":"Haoran","family":"Zhu","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3927-1102","authenticated-orcid":false,"given":"Yu","family":"Huang","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4701-2239","authenticated-orcid":false,"given":"Pengcheng","family":"Yao","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6302-813X","authenticated-orcid":false,"given":"Xiaofei","family":"Liao","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3934-7605","authenticated-orcid":false,"given":"Hai","family":"Jin","sequence":"additional","affiliation":[{"name":"Huazhong University of Science and Technology, Wuhan, Hubei, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2024,11,7]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Proceedings of MICRO. 1342--1358","author":"Chen X.","unstructured":"X. Chen, Y. Chen, F. Cheng, H. Tan, B. He, and W. Wong. 2022. ReGraph: Scaling Graph Processing on HBM-enabled FPGAs with Heterogeneous Pipelines. In Proceedings of MICRO. 1342--1358."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"crossref","unstructured":"J. Cong J. Lau G. Liu S. Neuendorffer P. Pan K. Vissers and Z. Zhang. 2022. FPGA HLS Today: Successes Challenges and Opportunities. ACM TRETS (2022) 51:1--51:42.","DOI":"10.1145\/3530775"},{"key":"e_1_3_2_1_3_1","volume-title":"Proceedings of ARC. 117--128","author":"Diamantopoulos D.","unstructured":"D. Diamantopoulos, S. Xydis, K. Siozios, and D. Soudris. 2015. Dynamic Memory Management in Vivado-HLS for Scalable Many-Accelerator Architectures. In Proceedings of ARC. 117--128."},{"key":"e_1_3_2_1_4_1","volume-title":"Proceedings of FPT. 275--278","author":"Giamblanco N.","unstructured":"N. Giamblanco and J. Anderson. 2019. ASAP: Automatic Sizing and Partitioning for Dynamic Memory Heaps in High-Level Synthesis. In Proceedings of FPT. 275--278."},{"key":"e_1_3_2_1_5_1","volume-title":"Proceedings of FPL. 314--320","author":"Giamblanco N.","unstructured":"N. Giamblanco and J. Anderson. 2019. A Dynamic Memory Allocation Library for High-Level Synthesis. In Proceedings of FPL. 314--320."},{"key":"e_1_3_2_1_6_1","volume-title":"Proceedings of FPL. 287--293","author":"Kokkinis A.","unstructured":"A. Kokkinis, D. Diamantopoulos, and K. Siozios. 2022. Dynamic Heap Management in High-Level Synthesis for Many-Accelerator Architectures. In Proceedings of FPL. 287--293."},{"key":"e_1_3_2_1_7_1","volume-title":"Proceedings of ICSE. 493--505","author":"Lau J.","unstructured":"J. Lau, A. Sivaraman, Q. Zhang, M. Gulzar, J. Cong, and M. Kim. 2020. HeteroRefactor: refactoring for heterogeneous computing with FPGA. In Proceedings of ICSE. 493--505."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"crossref","unstructured":"T. Liang J. Zhao L. Feng S. Sinha and W. Zhang. 2018. Hi-DMM: HighPerformance Dynamic Memory Management in High-Level Synthesis. IEEE TCAD (2018) 2555--2566.","DOI":"10.1109\/TCAD.2018.2857040"},{"key":"e_1_3_2_1_9_1","volume-title":"Proceedings of ASPLOS. 123--137","author":"Maas M.","unstructured":"M. Maas, U. Beaugnon, A. Chauhan, and B. Ilbeyi. 2023. TelaMalloc: Efficient On-Chip Memory Allocation for Production Machine Learning Accelerators. In Proceedings of ASPLOS. 123--137."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/358841.358852"},{"key":"e_1_3_2_1_11_1","volume-title":"Proceedings of FPGA. 149--159","author":"Wang Q.","unstructured":"Q. Wang, L. Zheng, Y. Huang, P. Yao, C. Gui, X. Liao, H. Jin, W. Jiang, and F. Mao. 2021. GraSU: A Fast Graph Update Library for FPGA-based Dynamic Graph Processing. In Proceedings of FPGA. 149--159."},{"key":"e_1_3_2_1_12_1","unstructured":"Xilinx. 2021. Vivado Design Suite User Guide High-Level Synthesis. https:\/\/docs.amd.com\/v\/u\/en-US\/ug902-vivado-high-level-synthesis."},{"key":"e_1_3_2_1_13_1","volume-title":"Proceedings of FPL. 1--7.","author":"Xue Z.","unstructured":"Z. Xue and D. Thomas. 2015. SysAlloc: A hardware manager for dynamic memory allocation in heterogeneous systems. In Proceedings of FPL. 1--7."},{"key":"e_1_3_2_1_14_1","volume-title":"Proceedings of FCCM. 64--71","author":"Xue Z.","unstructured":"Z. Xue and D. Thomas. 2016. SynADT: Dynamic Data Structures in High Level Synthesis. In Proceedings of FCCM. 64--71."}],"event":{"name":"DAC '24: 61st ACM\/IEEE Design Automation Conference","location":"San Francisco CA USA","acronym":"DAC '24","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 61st ACM\/IEEE Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649329.3655945","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3649329.3655945","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:17:54Z","timestamp":1750295874000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649329.3655945"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,23]]},"references-count":14,"alternative-id":["10.1145\/3649329.3655945","10.1145\/3649329"],"URL":"https:\/\/doi.org\/10.1145\/3649329.3655945","relation":{},"subject":[],"published":{"date-parts":[[2024,6,23]]},"assertion":[{"value":"2024-11-07","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}