{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,2]],"date-time":"2025-11-02T19:10:57Z","timestamp":1762110657366,"version":"build-2065373602"},"publisher-location":"New York, NY, USA","reference-count":23,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,6,23]],"date-time":"2024-06-23T00:00:00Z","timestamp":1719100800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,6,23]]},"DOI":"10.1145\/3649329.3657329","type":"proceedings-article","created":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T19:27:22Z","timestamp":1731007642000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["HTAG-eNN: Hardening Technique with AND Gates for Embedded Neural Networks"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0006-9192-7697","authenticated-orcid":false,"given":"Wilfread","family":"Guillem\u00e9","sequence":"first","affiliation":[{"name":"IRISA\/INRIA UMR 6074, Universit\u00e9 de Rennes, Lannion, Bretagne, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9293-469X","authenticated-orcid":false,"given":"Angeliki","family":"Kritikakou","sequence":"additional","affiliation":[{"name":"IRISA\/INRIA UMR 6074, Institut Universitaire de France, Universit\u00e9 de Rennes, Rennes, Bretagne, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-9223-7759","authenticated-orcid":false,"given":"Youri","family":"Helen","sequence":"additional","affiliation":[{"name":"DGA MI, Bruz, Bretagne, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1525-4225","authenticated-orcid":false,"given":"Cedric","family":"Killian","sequence":"additional","affiliation":[{"name":"Laboratoire Hubert Curien UMR 5516, CNRS, Universit\u00e9 Jean Monnet Saint-Etienne, Saint-Etienne, Auvergne - Rh\u00f4ne-Alpes, France"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3414-9084","authenticated-orcid":false,"given":"Daniel","family":"Chillet","sequence":"additional","affiliation":[{"name":"IRISA\/INRIA UMR 6074, Universit\u00e9 de Rennes, Lannion, Bretagne, France"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2024,11,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-25772-3"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2910232"},{"key":"e_1_3_2_1_3_1","first-page":"117","volume-title":"Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002","author":"Shashi","year":"2002","unstructured":"Shashi Kumar et al. \"A network on chip architecture and design methodology\". In: Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002. IEEE. 2002, pp. 117--124."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/DSD51259.2020.00109"},{"key":"e_1_3_2_1_5_1","first-page":"1","volume-title":"2019 IEEE Latin American Test Symposium (LATS). IEEE.","author":"Alberto","year":"2019","unstructured":"Alberto Bosio et al. \"A reliability analysis of a deep neural network\". In: 2019 IEEE Latin American Test Symposium (LATS). IEEE. 2019, pp. 1--6."},{"key":"e_1_3_2_1_6_1","first-page":"60","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","author":"Yangchao","year":"2022","unstructured":"Yangchao Zhang et al. \"Estimating vulnerability of all model parameters in dnn with a small number of fault injections\". In: 2022 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE. 2022, pp. 60--63."},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2018.2884460"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.5815\/ijem.2016.05.02"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/ETS56758.2023.10174178"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/5.726791"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO50266.2020.00033"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126964"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDAT.2019.2952336"},{"key":"e_1_3_2_1_14_1","first-page":"1","volume-title":"Proceedings of the 55th Annual Design Automation Conference.","author":"Brandon","year":"2018","unstructured":"Brandon Reagen et al. \"Ares: A framework for quantifying the resilience of deep neural networks\". In: Proceedings of the 55th Annual Design Automation Conference. 2018, pp. 1--6."},{"key":"e_1_3_2_1_15_1","first-page":"1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE.","author":"A","year":"2023","unstructured":"A Ruospo et al. \"Assessing convolutional neural networks reliability through statistical fault injections\". In: 2023 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE. 2023, pp. 1--6."},{"key":"e_1_3_2_1_16_1","volume-title":"Proc. Boston area ARChitecture (BARC) Workshop.","author":"Eldridge Schuyler","year":"2015","unstructured":"Schuyler Eldridge and Ajay Joshi. \"Exploiting hidden layer modular redundancy for fault-tolerance in neural network accelerators\". In: Proc. Boston area ARChitecture (BARC) Workshop. 2015."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-92137-0_28"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1109\/WACV51458.2022.00194"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1109\/MITP.2023.3264849"},{"key":"e_1_3_2_1_20_1","volume-title":"MATIC: Learning Around Errors for Efficient Low-Voltage Neural Network Accelerators","author":"Sung Kim","year":"2018","unstructured":"Sung Kim et al. MATIC: Learning Around Errors for Efficient Low-Voltage Neural Network Accelerators. 2018. arXiv: 1706.04332 [cs.NE]."},{"key":"e_1_3_2_1_21_1","first-page":"1215","volume-title":"IEEE transactions on neural networks and learning systems 23.8","author":"Mahdiani Hamid Reza","year":"2012","unstructured":"Hamid Reza Mahdiani, Sied Mehdi Fakhraie, and Caro Lucas. \"Relaxed fault-tolerant hardware implementation of neural networks in the presence of multiple transient errors\". In: IEEE transactions on neural networks and learning systems 23.8 (2012), pp. 1215--1228."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE48585.2020.9116571"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2022.3159089"}],"event":{"name":"DAC '24: 61st ACM\/IEEE Design Automation Conference","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"San Francisco CA USA","acronym":"DAC '24"},"container-title":["Proceedings of the 61st ACM\/IEEE Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649329.3657329","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3649329.3657329","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:17:56Z","timestamp":1750295876000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649329.3657329"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,23]]},"references-count":23,"alternative-id":["10.1145\/3649329.3657329","10.1145\/3649329"],"URL":"https:\/\/doi.org\/10.1145\/3649329.3657329","relation":{},"subject":[],"published":{"date-parts":[[2024,6,23]]},"assertion":[{"value":"2024-11-07","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}