{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,29]],"date-time":"2025-11-29T08:03:41Z","timestamp":1764403421864,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":8,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,6,23]],"date-time":"2024-06-23T00:00:00Z","timestamp":1719100800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","award":["CHIMES 3136.002"],"award-info":[{"award-number":["CHIMES 3136.002"]}],"id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100014553","name":"Samsung Advanced Institute of Technology","doi-asserted-by":"publisher","award":["AI for Semiconductors Program"],"award-info":[{"award-number":["AI for Semiconductors Program"]}],"id":[{"id":"10.13039\/100014553","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,6,23]]},"DOI":"10.1145\/3649329.3657333","type":"proceedings-article","created":{"date-parts":[[2024,11,7]],"date-time":"2024-11-07T19:27:22Z","timestamp":1731007642000},"page":"1-6","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["GNN-assisted Back-side Clock Routing Methodology for Advance Technologies"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7297-9738","authenticated-orcid":false,"given":"Nesara Eranna","family":"Bethur","sequence":"first","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2897-7142","authenticated-orcid":false,"given":"Pruek","family":"Vanna-Iampikul","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9998-8009","authenticated-orcid":false,"given":"Odysseas","family":"Zografos","sequence":"additional","affiliation":[{"name":"imec, Leuven, Vlaams-Brabant, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1520-0796","authenticated-orcid":false,"given":"Lingjun","family":"Zhu","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8706-4311","authenticated-orcid":false,"given":"Giuliano","family":"Sisto","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Flemish Brabant, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5915-5160","authenticated-orcid":false,"given":"Dragomir","family":"Milojevic","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Leuven, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6461-3864","authenticated-orcid":false,"given":"Alberto","family":"Garcia-Ortiz","sequence":"additional","affiliation":[{"name":"ITEM (U.Bremen), Bremen, Germany"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5376-2119","authenticated-orcid":false,"given":"Geert","family":"Hellings","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Flemish Brabant, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0001-0140-3042","authenticated-orcid":false,"given":"Julien","family":"Ryckaert","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Flemish Brabant, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3599-8515","authenticated-orcid":false,"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[{"name":"IMEC, Leuven, Flanders, Belgium"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2267-5282","authenticated-orcid":false,"given":"Sung Kyu","family":"Lim","sequence":"additional","affiliation":[{"name":"Georgia Institute of Technology, Atlanta, GA, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2024,11,7]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM45625.2022.10019521"},{"volume-title":"Buried Power Rails and Nano-Scale TSV: Technology Boosters for Backside Power Delivery Network and 3D Heterogeneous Integration. In 2022 IEEE 72nd ECTC","author":"Jourdain A.","key":"e_1_3_2_1_2_1","unstructured":"A. Jourdain et al. Buried Power Rails and Nano-Scale TSV: Technology Boosters for Backside Power Delivery Network and 3D Heterogeneous Integration. In 2022 IEEE 72nd ECTC."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.23919\/VLSITechnologyandCir57934.2023.10185369"},{"key":"e_1_3_2_1_4_1","volume-title":"Proceedings of the 24th ACM\/IEEE Workshop on System Level Interconnect Pathfinding","author":"R","year":"2023","unstructured":"R Chen et al. Opportunities of Chip Power Integrity and Performance Improvement through Wafer Backside (BS) Connection: Invited Paper. In Proceedings of the 24th ACM\/IEEE Workshop on System Level Interconnect Pathfinding, 2023."},{"key":"e_1_3_2_1_5_1","first-page":"42","volume-title":"2020 ECTC","author":"A","year":"2020","unstructured":"A Jourdain et al. Extreme wafer thinning and nano-tsv processing for 3d heterogeneous integration. In 2020 ECTC, pages 42--48, 2020."},{"key":"e_1_3_2_1_6_1","volume-title":"ISLPED","author":"SM","year":"2023","unstructured":"SM Shaji et al. A comparative study on front-side, buried and back-side power rail topologies in 3nm technology node. In ISLPED 2023."},{"key":"e_1_3_2_1_7_1","volume-title":"Inductive representation learning on large graphs. Advances in neural information processing systems, 30","author":"Hamilton W","year":"2017","unstructured":"W Hamilton et al. Inductive representation learning on large graphs. Advances in neural information processing systems, 30, 2017."},{"volume-title":"Proceedings of the 21st ASPLOS 2016.","author":"J","key":"e_1_3_2_1_8_1","unstructured":"J Balkind et al. OpenPiton: An Open Source Manycore Research Framework. In Proceedings of the 21st ASPLOS 2016."}],"event":{"name":"DAC '24: 61st ACM\/IEEE Design Automation Conference","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE-CEDA","SIGBED ACM Special Interest Group on Embedded Systems"],"location":"San Francisco CA USA","acronym":"DAC '24"},"container-title":["Proceedings of the 61st ACM\/IEEE Design Automation Conference"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649329.3657333","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3649329.3657333","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:18:00Z","timestamp":1750295880000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649329.3657333"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,23]]},"references-count":8,"alternative-id":["10.1145\/3649329.3657333","10.1145\/3649329"],"URL":"https:\/\/doi.org\/10.1145\/3649329.3657333","relation":{},"subject":[],"published":{"date-parts":[[2024,6,23]]},"assertion":[{"value":"2024-11-07","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}