{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,20]],"date-time":"2026-06-20T16:19:04Z","timestamp":1781972344021,"version":"3.54.5"},"publisher-location":"New York, NY, USA","reference-count":15,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,6,12]],"date-time":"2024-06-12T00:00:00Z","timestamp":1718150400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-sa\/4.0\/"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,6,12]]},"DOI":"10.1145\/3649476.3658718","type":"proceedings-article","created":{"date-parts":[[2024,6,10]],"date-time":"2024-06-10T12:29:41Z","timestamp":1718022581000},"page":"69-77","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":7,"title":["EDA-schema: A Graph Datamodel Schema and Open Dataset for Digital Design Automation"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7128-0893","authenticated-orcid":false,"given":"Pratik","family":"Shrestha","sequence":"first","affiliation":[{"name":"Department of Engineering, Drexel University, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9432-5073","authenticated-orcid":false,"given":"Alec","family":"Aversa","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, Drexel Univesity, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-4303-7702","authenticated-orcid":false,"given":"Saran","family":"Phatharodom","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, Drexel Univesity, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4230-1795","authenticated-orcid":false,"given":"Ioannis","family":"Savidis","sequence":"additional","affiliation":[{"name":"Electrical and Computer Engineering, Drexel Univesity, USA"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2024,6,12]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/3451179"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED60706.2024.10528675"},{"key":"e_1_3_2_1_3_1","first-page":"18","volume-title":"OpenABC-D: A large-scale dataset for machine learning guided integrated circuit synthesis","author":"Chowdhury B.","year":"2021","unstructured":"[3] A.\u00a0B. Chowdhury, B.\u00a0Tan, R.\u00a0Karri, and S.\u00a0Garg, \u201cOpenABC-D: A large-scale dataset for machine learning guided integrated circuit synthesis,\u201d arXiv preprint arXiv:2110.11292, pp. 1\u201318, Oct. 2021."},{"key":"e_1_3_2_1_4_1","first-page":"9","volume-title":"Proceedings of the IEEE\/ACM International Conference On Computer Aided Design (ICCAD)","author":"Jung A.","year":"2021","unstructured":"[4] J.\u00a0Jung, A.\u00a0B. Kahng, S.\u00a0Kim, and R.\u00a0Varadarajan, \u201cMETRICS2.1 and flow tuning in the IEEE CEDA robust design flow and OpenROAD,\u201d Proceedings of the IEEE\/ACM International Conference On Computer Aided Design (ICCAD), pp. 1\u20139, Nov. 2021."},{"key":"e_1_3_2_1_5_1","volume-title":"International Workshop for Logic Synthesis (IWLS): http:\/\/www.iwls.org","author":"Albrecht","year":"2005","unstructured":"[5] C.\u00a0Albrecht, \u201cIWLS 2005 benchmarks,\u201d In International Workshop for Logic Synthesis (IWLS): http:\/\/www.iwls.org, Jun. 2005."},{"key":"e_1_3_2_1_6_1","first-page":"6","volume-title":"Proceedings of the Government Microcircuit Applications and Critical Technology Conference","author":"Ajayi D.","year":"2019","unstructured":"[6] T.\u00a0Ajayi and D.\u00a0Blaauw, \u201cOpenROAD: Toward a self-driving, open-source digital layout implementation tool chain,\u201d Proceedings of the Government Microcircuit Applications and Critical Technology Conference, pp. 1\u20136, Mar. 2019."},{"key":"e_1_3_2_1_7_1","first-page":"641","volume-title":"IEEE standard for integrated circuit (IC) open library architecture (OLA)","year":"2019","unstructured":"[7] \u201cIEEE standard for integrated circuit (IC) open library architecture (OLA),\u201d IEEE Std 1481-2019 (Revision of IEEE Std 1481-2009), pp. 1\u2013641, Mar. 2020."},{"key":"e_1_3_2_1_8_1","first-page":"6","volume-title":"Proceedings of the IEEE Design, Automation and Test in Europe Conference and Exhibition","author":"Spindler F.","year":"2007","unstructured":"[8] P.\u00a0Spindler and F.\u00a0M. Johannes, \u201cFast and accurate routing demand estimation for efficient routability-driven placement,\u201d Proceedings of the IEEE Design, Automation and Test in Europe Conference and Exhibition, pp. 1\u20136, Apr. 2007."},{"key":"e_1_3_2_1_9_1","first-page":"9","volume-title":"Proceedings of the IEEE\/ACM International Conference on Computer-Aided Design (ICCAD)","author":"Agnesina K.","year":"2020","unstructured":"[9] A.\u00a0Agnesina, K.\u00a0Chang, and S.\u00a0K. Lim, \u201cVLSI placement parameter optimization using deep reinforcement learning,\u201d Proceedings of the IEEE\/ACM International Conference on Computer-Aided Design (ICCAD), pp. 1\u20139, Nov. 2020."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3394885.3431562"},{"key":"e_1_3_2_1_11_1","first-page":"102","volume-title":"Proceedings of the ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD)","author":"Lu W.","year":"2022","unstructured":"[11] Y.-C. Lu, W.-T. Chan, V.\u00a0Khandelwal, and S.\u00a0K. Lim, \u201cDriving early physical synthesis exploration through end-of-flow total power prediction,\u201d Proceedings of the ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD), pp. 97\u2013102, Sept. 2022."},{"key":"e_1_3_2_1_12_1","first-page":"6","volume-title":"Proceedings of the Design Automation Conference (DAC)","author":"Barboza N.","year":"2019","unstructured":"[12] E.\u00a0C. Barboza, N.\u00a0Shukla, Y.\u00a0Chen, and J.\u00a0Hu, \u201cMachine learning-based pre-routing timing prediction with reduced pessimism,\u201d Proceedings of the Design Automation Conference (DAC), pp. 1\u20136, Jun. 2019."},{"key":"e_1_3_2_1_13_1","first-page":"133","volume-title":"Proceedings of the ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD)","author":"Shrestha S.","year":"2022","unstructured":"[13] P.\u00a0Shrestha, S.\u00a0Phatharodom, and I.\u00a0Savidis, \u201cGraph representation learning for gate arrival time prediction,\u201d Proceedings of the ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD), pp. 127\u2013133, Sept. 2022."},{"key":"e_1_3_2_1_14_1","first-page":"5","volume-title":"Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS)","author":"Shrestha I.","year":"2023","unstructured":"[14] P.\u00a0Shrestha and I.\u00a0Savidis, \u201cGraph representation learning for parasitic impedance prediction of the interconnect,\u201d Proceedings of the IEEE International Symposium on Circuits and Systems (ISCAS), pp. 1\u20135, May 2023."},{"key":"e_1_3_2_1_15_1","first-page":"14","volume-title":"Proceedings of the ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD)","author":"Chhabria W.","year":"2022","unstructured":"[15] V.\u00a0A. Chhabria, W.\u00a0Jiang, A.\u00a0B. Kahng, and S.\u00a0S. Sapatnekar, \u201cFrom global route to detailed route: ML for fast and accurate wire parasitics and timing prediction,\u201d Proceedings of the ACM\/IEEE Workshop on Machine Learning for CAD (MLCAD), pp. 7\u201314, Sept. 2022."}],"event":{"name":"GLSVLSI '24: Great Lakes Symposium on VLSI 2024","location":"Clearwater FL USA","acronym":"GLSVLSI '24","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the Great Lakes Symposium on VLSI 2024"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649476.3658718","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3649476.3658718","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,22]],"date-time":"2025-08-22T02:32:15Z","timestamp":1755829935000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3649476.3658718"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,12]]},"references-count":15,"alternative-id":["10.1145\/3649476.3658718","10.1145\/3649476"],"URL":"https:\/\/doi.org\/10.1145\/3649476.3658718","relation":{},"subject":[],"published":{"date-parts":[[2024,6,12]]},"assertion":[{"value":"2024-06-12","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}