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Speculation and enumerative computation exploits the statistical properties of deterministic finite automata, allowing for more efficient pattern matching. Existing related designs mostly revolve around vector instructions and multiple processors\/cores or SIMD instruction sets, with a lack of implementation on FPGA platforms. We design a parallelized two-character matching engine on FPGA for efficiently fast filtering off fields with no pattern features. We transform the state transitions with sequential dependencies to the existing problem of elements in one set, enabling the proposed design to achieve high throughput with low resource consumption and support dynamic updates. Results show that compared with the traditional DFA matching, with a maximum resource consumption of 25% for on-chip FFs (74323\/1045440) and LUTs (123902\/522720), there is an improvement in throughput of 8.08\u2013229.96\u00d7\n            <jats:italic>speedup<\/jats:italic>\n            and 87.61\u201399.56%\n            <jats:italic>speed-up(percentage improvement)<\/jats:italic>\n            for normal traffic, and 11.73\u201339.59\u00d7\n            <jats:italic>speedup<\/jats:italic>\n            and 91.47\u201397.47%\n            <jats:italic>speed-up(percentage improvement)<\/jats:italic>\n            for traffic with high-frequency match hits. Compared with the state-of-the-art similar implementation, our circuit on a single FPGA chip is superior to existing multi-core designs.\n          <\/jats:p>","DOI":"10.1145\/3655626","type":"journal-article","created":{"date-parts":[[2024,4,1]],"date-time":"2024-04-01T11:10:20Z","timestamp":1711969820000},"page":"1-28","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["PTME: A Regular Expression Matching Engine Based on Speculation and Enumerative Computation on FPGA"],"prefix":"10.1145","volume":"18","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-4304-2836","authenticated-orcid":false,"given":"Mingqian","family":"Sun","sequence":"first","affiliation":[{"name":"Southeast University, Nanjing, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-6543-8173","authenticated-orcid":false,"given":"Guangwei","family":"Xie","sequence":"additional","affiliation":[{"name":"Fudan University, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7456-8377","authenticated-orcid":false,"given":"Fan","family":"Zhang","sequence":"additional","affiliation":[{"name":"National Digital Switching System Engineering and Technological Research Center, Zhengzhou, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1023-7277","authenticated-orcid":false,"given":"Wei","family":"Guo","sequence":"additional","affiliation":[{"name":"National Digital Switching System Engineering and Technological Research Center, Zhengzhou, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8698-6584","authenticated-orcid":false,"given":"Xitian","family":"Fan","sequence":"additional","affiliation":[{"name":"Shanghai HONGZHEN Information Science &amp; Technology Corporation, Shanghai, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6445-021X","authenticated-orcid":false,"given":"Tianyang","family":"Li","sequence":"additional","affiliation":[{"name":"National Digital Switching System Engineering and Technological Research Center, Zhengzhou, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-8206-5255","authenticated-orcid":false,"given":"Li","family":"Chen","sequence":"additional","affiliation":[{"name":"National Digital Switching System Engineering and Technological Research Center, Zhengzhou, China"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-8287-709X","authenticated-orcid":false,"given":"Jiayu","family":"Du","sequence":"additional","affiliation":[{"name":"Purple Mountain Laboratories, Nanjing, China"}]}],"member":"320","published-online":{"date-parts":[[2024,12,17]]},"reference":[{"key":"e_1_3_2_2_2","article-title":"AXI High Bandwidth Memory Controller LogiCORE IP Product Guide (PG276)","author":"Devices Xilinx Advanced Micro","unstructured":"Xilinx Advanced Micro Devices. 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