{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,27]],"date-time":"2026-06-27T18:35:37Z","timestamp":1782585337867,"version":"3.54.5"},"reference-count":36,"publisher":"Association for Computing Machinery (ACM)","issue":"4","license":[{"start":{"date-parts":[[2024,6,29]],"date-time":"2024-06-29T00:00:00Z","timestamp":1719619200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2024,7,31]]},"abstract":"<jats:p>\n            The employment of Machine Learning (ML) techniques in embedded systems has seen constant growth in recent years, especially for black-box ML techniques (such as Artificial Neural Networks (ANNs)). However, despite the successful employment of ML techniques in embedded environments, their performance potential is constrained by the limited computing resources of their embedded computers. Several hardware-based approaches were developed (e.g., using FPGAs and ASICs) to address the constraints of limited computing resources. The scope of this work focuses on improving the performance for Inductive Logic Programming (ILP) on embedded environments. ILP is a powerful logic-based ML technique that uses logic programming to construct human-interpretable ML models, where those logic-based ML models are capable of describing\u00a0complex and multi-relational concepts. In this work, we present a hardware-based approach that accelerates the hypothesis evaluation task for ILPs in embedded environments that use Description Logic (DL) languages as their logic-based representation. In particular, we target the\n            <jats:inline-formula content-type=\"math\/tex\">\n              <jats:tex-math notation=\"LaTeX\" version=\"MathJax\">\\(\\mathcal {ALCQ}^{\\mathcal {(D)}}\\)<\/jats:tex-math>\n            <\/jats:inline-formula>\n            language. According to experimental results (through an FPGA implementation), our presented approach has achieved speedups up to 48.7-fold for a disjunction of 32 concepts on 100 M individuals, where the baseline performance is the sequential CPU performance of the Raspberry Pi 4. For role and concrete role restrictions, the FPGA implementation achieved speedups up to 2.4-fold (for MIN cardinality role restriction on 1M role assertions); all FPGA implemented role and concrete role restrictions have achieved similar speedups. In the worst-case scenario, the FPGA implementation achieved either a similar or slightly better performance than the baseline (for all DL operations); the worst-case scenario resulted from using small datasets such as: using conjunction and disjunction on &lt; 100 individuals, and using role and concrete (float\/string) role restrictions on &lt; 100,000 assertions.\n          <\/jats:p>","DOI":"10.1145\/3665277","type":"journal-article","created":{"date-parts":[[2024,5,21]],"date-time":"2024-05-21T08:27:46Z","timestamp":1716280066000},"page":"1-37","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["A Hardware Approach For Accelerating Inductive Learning In Description Logic"],"prefix":"10.1145","volume":"23","author":[{"ORCID":"https:\/\/orcid.org\/0009-0002-8152-4270","authenticated-orcid":false,"given":"Eyad","family":"Algahtani","sequence":"first","affiliation":[{"name":"King Saud University, Riyadh, Saudi Arabia"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2024,6,29]]},"reference":[{"key":"e_1_3_1_3_2","volume-title":"\u2018HT-HEDL: High-throughput hypothesis evaluation in description logic\u2019","author":"Algahtani E.","unstructured":"E. Algahtani. 2024. \u2018HT-HEDL: High-throughput hypothesis evaluation in description logic\u2019. IEEE Access, under review."},{"key":"e_1_3_1_4_2","unstructured":"Raspberry Pi 4. Retrieved May 20 2023 from https:\/\/www.raspberrypi.org\/products\/raspberry-pi-4-model-b\/"},{"key":"e_1_3_1_5_2","volume-title":"Proceedings of the Advances in Data Mining. Applications and Theoretical Aspects: 14th Industrial Conference, ICDM 2014, St","author":"Elragal Nada","year":"2014","unstructured":"Elgendy, Nada and Elragal, Ahmed. 2014. \u2018Big data analytics: A literature review paper\u2019. In Proceedings of the Advances in Data Mining. Applications and Theoretical Aspects: 14th Industrial Conference, ICDM 2014, St. Petersburg, Russia, July 16-20, 2014."},{"key":"e_1_3_1_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2018.2814567"},{"key":"e_1_3_1_7_2","volume-title":"Proceedings of the 1st International Conference on Computational Collective Intelligence. 413\u2013424","author":"Meissner A.","year":"2009","unstructured":"A. Meissner. 2009. \u2018A simple parallel reasoning system for the ALC description logic\u2019. In Proceedings of the 1st International Conference on Computational Collective Intelligence. 413\u2013424."},{"key":"e_1_3_1_8_2","volume-title":"Proceedings of the 25th International Workshop on Description Logics,. 378\u2013388","author":"Wu K.","unstructured":"K. Wu and V. Haarslev. 2012. \u2018A parallel reasoner for the description logic ALC\u2019. In Proceedings of the 25th International Workshop on Description Logics,. 378\u2013388."},{"key":"e_1_3_1_10_2","volume-title":"Retrieved","author":"The","year":"2024","unstructured":"The DL-Learner 1.4.0 repository. Retrieved January 19, 2024 from https:\/\/github.com\/SmartDataAnalytics\/DL-Learner\/releases\/tag\/1.4.0"},{"key":"e_1_3_1_11_2","volume-title":"Cambridge: Cambridge University Press.s33","author":"Baader F.","year":"2017","unstructured":"F. Baader, I. Horrocks, C. Lutz, and U. Sattler. 2017. \u2018An Introduction to Description Logic\u2019. Cambridge: Cambridge University Press.s33"},{"key":"e_1_3_1_12_2","volume-title":"Proceedings of the 10th International Conference on Inductive Logic Programming (ILP2000)","author":"Blockeel H.","unstructured":"H. Blockeel, L. Dehaspe, B. Demoen, G. Janssens, and J. Ramon. 2000. \u2018Executing query packs in ILP\u2019. In Proceedings of the 10th International Conference on Inductive Logic Programming (ILP2000). 60\u201377."},{"key":"e_1_3_1_13_2","first-page":"33","article-title":"A survey on ontology reasoners and comparison","volume":"57","author":"Abburu S.","year":"2012","unstructured":"S. Abburu. 2012. \u2018A survey on ontology reasoners and comparison\u2019. International Journal of Computer Applications 57, 17 (2012), 33\u201339.","journal-title":"International Journal of Computer Applications"},{"key":"e_1_3_1_14_2","unstructured":"S. Konstantopoulos. 2007. \u2018A data-parallel version of aleph\u2019 arXiv 0708.1527. Available at: https:\/\/arxiv.org\/pdf\/0708.1527.pdf. (Accessed 3 June 2024)."},{"key":"e_1_3_1_15_2","volume-title":"Proceedings of the 16th International Conference on Inductive Logic Programming, Santiago de Compostela, August 24-27","author":"Paes A.","unstructured":"A. Paes, F. Z\u030eelezn\u00fd, G. Zaverucha, D. Page, and A. Srinivasan. 2006. \u2018ILP through propositionalization and stochastic k-term DNF learning\u2019. In Proceedings of the 16th International Conference on Inductive Logic Programming, Santiago de Compostela, August 24-27, 379\u2013393."},{"key":"e_1_3_1_16_2","doi-asserted-by":"publisher","DOI":"10.1023\/A:1009824123462"},{"key":"e_1_3_1_17_2","doi-asserted-by":"publisher","DOI":"10.1007\/s10766-015-0364-7"},{"key":"e_1_3_1_18_2","volume-title":"Proceedings of the 20th International Conference on Inductive Logic Programming. Florence.","author":"Srinivasan A.","unstructured":"A. Srinivasan, T. A. Faruquie, and S. Joshi. 2010. \u2018Exact data parallel computation for very large ILP datasets\u2019. In Proceedings of the 20th International Conference on Inductive Logic Programming. Florence."},{"key":"e_1_3_1_19_2","doi-asserted-by":"publisher","DOI":"10.1007\/s10994-008-5094-2"},{"key":"e_1_3_1_20_2","volume-title":"Proceedings of the 29th International Conference on Inductive Logic Programming, Plovdiv, September 3, 1\u201315","author":"Algahtani E.","unstructured":"E. Algahtani and D. Kazakov. 2019. \u2018CONNER: A concurrent ILP learner in description logic\u2019. In Proceedings of the 29th International Conference on Inductive Logic Programming, Plovdiv, September 3, 1\u201315."},{"key":"e_1_3_1_21_2","doi-asserted-by":"publisher","DOI":"10.1145\/3289185"},{"key":"e_1_3_1_22_2","volume-title":"Microprocessors and Microsystems 89","author":"Machupalli R.","year":"2022","unstructured":"R. Machupalli, M. Hossain, and M. Mandal. 2022. \u2018Review of ASIC accelerators for deep neural network\u2019. Microprocessors and Microsystems 89, (2022), 104441."},{"key":"e_1_3_1_23_2","volume-title":"Proceedings of the 4th International Conference on Computer Science and Network Technology","author":"Zhou Yongmei","year":"2015","unstructured":"Yongmei Zhou and Jingfei Jiang. 2015. \u2018An FPGA-based accelerator implementation for deep convolutional neural networks\u2019. In Proceedings of the 4th International Conference on Computer Science and Network Technology, Harbin, China, 2015, 829\u2013832."},{"key":"e_1_3_1_24_2","volume-title":"IEEE International Conference on Semiconductor Electronics","author":"Rajah A.","year":"2004","unstructured":"A. Rajah and M. Khalil Hani. 2004. \u2018ASIC design of a Kohonen neural network microchip\u2019. IEEE International Conference on Semiconductor Electronics, Kuala Lumpur, Malaysia, 2004, 4."},{"key":"e_1_3_1_25_2","volume-title":"Available at: Retrieved","author":"Jetson NVIDIA","year":"2023","unstructured":"NVIDIA Jetson. Available at: Retrieved May 20, 2023 from https:\/\/www.nvidia.com\/en-us\/autonomous-machines\/embedded-systems\/"},{"key":"e_1_3_1_26_2","volume-title":"Available at: Retrieved","author":"Starter Kit Cyclone V GX","year":"2023","unstructured":"Cyclone V GX Starter Kit. Available at: Retrieved May 20, 2023 https:\/\/www.terasic.com.tw\/cgi-bin\/page\/archive.pl?Language=English&CategoryNo=167&No=830#contents"},{"key":"e_1_3_1_27_2","doi-asserted-by":"publisher","DOI":"10.1007\/s42979-023-01888-w"},{"key":"e_1_3_1_28_2","doi-asserted-by":"publisher","DOI":"10.1016\/j.ijin.2022.05.002"},{"key":"e_1_3_1_29_2","volume-title":"Web Ontology Language Reference. Available at: Retrieved","author":"OWL.","year":"2023","unstructured":"OWL. 2004. Web Ontology Language Reference. Available at: Retrieved September 26, 2023 https:\/\/www.w3.org\/TR\/owl-ref\/"},{"key":"e_1_3_1_30_2","doi-asserted-by":"publisher","DOI":"10.1145\/1327452.1327492"},{"key":"e_1_3_1_31_2","doi-asserted-by":"publisher","DOI":"10.1021\/jm00106a046"},{"key":"e_1_3_1_32_2","doi-asserted-by":"publisher","DOI":"10.1016\/B978-1-55860-200-7.50083-0"},{"key":"e_1_3_1_33_2","volume-title":"Proceedings of the 27th International Conference on Inductive Logic Programming. 38\u201350","author":"Qomariyah N. N.","unstructured":"N. N. Qomariyah and D. Kazakov. 2017. Learning from ordinal data with inductive logic programming in description logic\u2019. In Proceedings of the 27th International Conference on Inductive Logic Programming. 38\u201350."},{"key":"e_1_3_1_34_2","unstructured":"OpenMPI. Retrieved September 28 2023 from https:\/\/www.open-mpi.org\/"},{"key":"e_1_3_1_35_2","doi-asserted-by":"publisher","DOI":"10.1007\/BF03037227"},{"key":"e_1_3_1_36_2","volume-title":"Menlo Park","author":"Warren D.","year":"1983","unstructured":"D. Warren. 1983. \u2018An abstract prolog instruction set\u2019. Technical Note 309, SRI International, Menlo Park, California, October 1983."},{"key":"e_1_3_1_37_2","volume-title":"Proceedings of the IEEE International Conference on Field-Programmable Technology","author":"Fidjeland A.","unstructured":"A. Fidjeland, W. Luk, and S. Muggleton. 2002. \u2018Scalable acceleration of inductive logic programs\u2019. In Proceedings of the IEEE International Conference on Field-Programmable Technology, Hong Kong. 252\u2013259."},{"key":"e_1_3_1_38_2","doi-asserted-by":"publisher","DOI":"10.1109\/TPAMI.1980.4767034"},{"key":"e_1_3_1_39_2","doi-asserted-by":"crossref","unstructured":"S. Muggleton and L. de Raedt. 1994. \u2018Inductive logic programming: Theory and methods\u2019. The Journal of Logic Programming 19-20 (1994) 629\u2013679.","DOI":"10.1016\/0743-1066(94)90035-3"}],"container-title":["ACM Transactions on Embedded Computing Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3665277","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3665277","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T00:58:34Z","timestamp":1750294714000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3665277"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,6,29]]},"references-count":36,"journal-issue":{"issue":"4","published-print":{"date-parts":[[2024,7,31]]}},"alternative-id":["10.1145\/3665277"],"URL":"https:\/\/doi.org\/10.1145\/3665277","relation":{},"ISSN":["1539-9087","1558-3465"],"issn-type":[{"value":"1539-9087","type":"print"},{"value":"1558-3465","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,6,29]]},"assertion":[{"value":"2023-10-10","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-05-07","order":1,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-06-29","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}