{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,5]],"date-time":"2026-02-05T08:11:10Z","timestamp":1770279070157,"version":"3.49.0"},"publisher-location":"New York, NY, USA","reference-count":77,"publisher":"ACM","license":[{"start":{"date-parts":[[2025,3,30]],"date-time":"2025-03-30T00:00:00Z","timestamp":1743292800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100006374","name":"National Research Foundation Singapore","doi-asserted-by":"publisher","award":["NRF-CRP23-2019-0003"],"award-info":[{"award-number":["NRF-CRP23-2019-0003"]}],"id":[{"id":"10.13039\/501100006374","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,3,30]]},"DOI":"10.1145\/3669940.3707230","type":"proceedings-article","created":{"date-parts":[[2025,2,6]],"date-time":"2025-02-06T12:28:01Z","timestamp":1738844881000},"page":"410-425","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["Enhancing CGRA Efficiency Through Aligned Compute and Communication Provisioning"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7513-9494","authenticated-orcid":false,"given":"Zhaoying","family":"Li","sequence":"first","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0009-0004-1339-6048","authenticated-orcid":false,"given":"Pranav","family":"Dangi","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-6068-7223","authenticated-orcid":false,"given":"Chenyang","family":"Yin","sequence":"additional","affiliation":[{"name":"Peking University, Beijing, China"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3413-136X","authenticated-orcid":false,"given":"Thilini Kaushalya","family":"Bandara","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6015-1084","authenticated-orcid":false,"given":"Rohan","family":"Juneja","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3727-2889","authenticated-orcid":false,"given":"Cheng","family":"Tan","sequence":"additional","affiliation":[{"name":"Google, San Francisco, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1143-0762","authenticated-orcid":false,"given":"Zhenyu","family":"Bai","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4136-4188","authenticated-orcid":false,"given":"Tulika","family":"Mitra","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]}],"member":"320","published-online":{"date-parts":[[2025,3,30]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Automation Test in Europe Conference Exhibition (DATE). 268--273","author":"Balasubramanian Mahesh","year":"2022","unstructured":"Mahesh Balasubramanian and Aviral Shrivastava. 2022. PathSeeker: A Fast Mapping Algorithm for CGRAs. In 2022 Design, Automation Test in Europe Conference Exhibition (DATE). 268--273."},{"key":"e_1_3_2_1_2_1","volume-title":"Peter Torelli, Jeremy Holleman, Nat Jeffries, Csaba Kiraly, Pietro Montino, David Kanter, Sebastian Ahmed, Danilo Pau, et al.","author":"Banbury Colby","year":"2021","unstructured":"Colby Banbury, Vijay Janapa Reddi, Peter Torelli, Jeremy Holleman, Nat Jeffries, Csaba Kiraly, Pietro Montino, David Kanter, Sebastian Ahmed, Danilo Pau, et al. 2021. Mlperf tiny benchmark. arXiv preprint arXiv:2106.07597 (2021)."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2017.7995277"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA.2005.9"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2004.5"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.5555\/2650280.2650333"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1016\/S0012--365X(85)80001--7"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00053"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/3503222.3507706"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358276"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"publisher","DOI":"10.1145\/3361682"},{"key":"e_1_3_2_1_12_1","volume-title":"Saeideh Sheikhpour, Tulika Mitra, and Lieven Eeckhout.","author":"Dangi Pranav","year":"2024","unstructured":"Pranav Dangi, Thilini Kaushalya Bandara, Saeideh Sheikhpour, Tulika Mitra, and Lieven Eeckhout. 2024. Sustainable Hardware Specialization. arXiv preprint arXiv:2411.09315 (2024)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2017.8050238"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3196101"},{"key":"e_1_3_2_1_15_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1081--1086","author":"Dave Shail","year":"2018","unstructured":"Shail Dave, Mahesh Balasubramanian, and Aviral Shrivastava. 2018. Ureca: Unified register file for cgras. In 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1081--1086."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/3613424.3614246"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/2000064.2000108"},{"key":"e_1_3_2_1_18_1","volume-title":"Amber: A 16-nm System-on-Chip With a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra","author":"Feng Kathleen","year":"2023","unstructured":"Kathleen Feng, Taeyoung Kong, Kalhan Koul, Jackson Melchert, Alex Carsello, Qiaoyi Liu, Gedeon Nyengele, Maxwell Strange, Keyi Zhang, Ankita Nayak, et al. 2023. Amber: A 16-nm System-on-Chip With a Coarse-Grained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. IEEE Journal of Solid-State Circuits (2023)."},{"key":"e_1_3_2_1_19_1","first-page":"558","article-title":"Processors, methods, and systems with a configurable spatial accelerator","volume":"10","author":"Fleming Kermin E","year":"2020","unstructured":"Kermin E Fleming, Kent D Glossop, Simon C Steely Jr, Jinjie Tang, Alan G Gara, et al. 2020. Processors, methods, and systems with a configurable spatial accelerator. US Patent 10,558,575.","journal-title":"US Patent"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2019.00023"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2018.8502438"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA52012.2021.00084"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO56248.2022.00046"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/3352460.3358277"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/2.839324"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2012.51"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/2155620.2155623"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593100"},{"key":"e_1_3_2_1_29_1","volume-title":"Technology Conference on Performance Evaluation and Benchmarking. Springer, 24--41","author":"Karimov Jeyhun","year":"2018","unstructured":"Jeyhun Karimov, Tilmann Rabl, and Volker Markl. 2018. Polybench: The first benchmark for polystores. In Technology Conference on Performance Evaluation and Benchmarking. Springer, 24--41."},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062262"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/2629610"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630123"},{"key":"e_1_3_2_1_33_1","unstructured":"Arnold Knopfmacher and M. Mays. 2003. Graph Compositions I: Basic Enumeration. (03 2003)."},{"key":"e_1_3_2_1_34_1","volume-title":"ChordMap: Automated Mapping of Streaming Applications onto CGRA","author":"Li Zhaoying","year":"2021","unstructured":"Zhaoying Li, Dhananjaya Wijerathne, Xianzhang Chen, Anuj Pathania, and Tulika Mitra. 2021. ChordMap: Automated Mapping of Streaming Applications onto CGRA. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems (2021)."},{"key":"e_1_3_2_1_35_1","volume-title":"Coarse-Grained Reconfigurable Array (CGRA). Handbook of Computer Architecture","author":"Li Zhaoying","year":"2022","unstructured":"Zhaoying Li, Dhananjaya Wijerathne, and Tulika Mitra. 2022. Coarse-Grained Reconfigurable Array (CGRA). Handbook of Computer Architecture (2022), 1--41."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA53966.2022.00040"},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247873"},{"key":"e_1_3_2_1_38_1","doi-asserted-by":"publisher","DOI":"10.1145\/201310.201328"},{"key":"e_1_3_2_1_39_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45234-8_7"},{"key":"e_1_3_2_1_40_1","doi-asserted-by":"publisher","DOI":"10.1145\/3582016.3582070"},{"key":"e_1_3_2_1_41_1","volume-title":"Network motifs: simple building blocks of complex networks. Science 298, 5594","author":"Milo Ron","year":"2002","unstructured":"Ron Milo, Shai Shen-Orr, Shalev Itzkovitz, Nadav Kashtan, Dmitri Chklovskii, and Uri Alon. 2002. Network motifs: simple building blocks of complex networks. Science 298, 5594 (2002), 824--827."},{"key":"e_1_3_2_1_42_1","doi-asserted-by":"publisher","DOI":"10.1145\/1168919.1168878"},{"key":"e_1_3_2_1_43_1","volume-title":"REMARC: Reconfigurable multimedia array coprocessor. IEICE Transactions on information and systems 82, 2","author":"Miyamori Takashi","year":"1999","unstructured":"Takashi Miyamori and Kunle Olukotun. 1999. REMARC: Reconfigurable multimedia array coprocessor. IEICE Transactions on information and systems 82, 2 (1999), 389--397."},{"key":"e_1_3_2_1_44_1","volume-title":"MICRO-54: 54th Annual IEEE\/ACM International Symposium on Microarchitecture. 1064--1077","author":"Daniel Sanchez Nguyen","year":"2021","unstructured":"QuanMNguyen and Daniel Sanchez. 2021. Fifer: Practical acceleration of irregular applications on reconfigurable architectures. In MICRO-54: 54th Annual IEEE\/ACM International Symposium on Microarchitecture. 1064--1077."},{"key":"e_1_3_2_1_45_1","volume-title":"A coarse grain reconfigurable array (CGRA) for statically scheduled data flow computing. Wave computing white paper","author":"Nicol Chris","year":"2017","unstructured":"Chris Nicol. 2017. A coarse grain reconfigurable array (CGRA) for statically scheduled data flow computing. Wave computing white paper (2017), 1--9."},{"key":"e_1_3_2_1_46_1","doi-asserted-by":"publisher","DOI":"10.1145\/3243176.3243212"},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080255"},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750380"},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.94"},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485935"},{"key":"e_1_3_2_1_51_1","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669160"},{"key":"e_1_3_2_1_52_1","doi-asserted-by":"publisher","DOI":"10.1145\/3079856.3080256"},{"key":"e_1_3_2_1_53_1","volume-title":"Lee Stephen Richardson Christos Kozyrakis Rehan Hameed, Wajahat Qadeer and Mark Horowitz","author":"Omid Azizi Alex Solomatnikov MeganWachs","year":"2023","unstructured":"MeganWachs Omid Azizi Alex Solomatnikov Benjamin C. Lee Stephen Richardson Christos Kozyrakis Rehan Hameed, Wajahat Qadeer and Mark Horowitz. 2023. RETROSPECTIVE: Understanding Sources of Inefficiency in General-purpose Chips. In ISCA@50 25-Year Retrospective: 1996--2020, Jos\u00e9 F. Mart\u00ednez and Lizy K. John (Eds.). ACM SIGARCH and IEEE TCCA. https:\/\/bit.ly\/isca50_retrospective"},{"key":"e_1_3_2_1_54_1","doi-asserted-by":"publisher","DOI":"10.1109\/HCS52781.2021.9567306"},{"key":"e_1_3_2_1_55_1","doi-asserted-by":"publisher","DOI":"10.1145\/3613424.3614283"},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337583"},{"key":"e_1_3_2_1_57_1","volume-title":"Proceedings of the 57th Annual IEEE\/ACM International Symposium on Microarchitecture.","author":"Tan Cheng","year":"2014","unstructured":"Cheng Tan, Miaomiao Jiang, Deepak Patil, Yanghui Ou, Zhaoying Li, Lei Ju, Tulika Mitra, Hyunchul Park, Antonino Tumeo, and Jeff Zhang. 2014. ICED: An Integrated CGRA Framework Enabling DVFS-Aware Acceleration. In Proceedings of the 57th Annual IEEE\/ACM International Symposium on Microarchitecture."},{"key":"e_1_3_2_1_58_1","volume-title":"VecPAC: A Vectorizable and Precision- Aware CGRA. In 2023 IEEE\/ACM International Conference on Computer Aided Design (ICCAD). IEEE, 1--9.","author":"Tan Cheng","year":"2023","unstructured":"Cheng Tan, Deepak Patil, Antonino Tumeo, Gabriel Weisz, Steve Reinhardt, and Jeff Zhang. 2023. VecPAC: A Vectorizable and Precision- Aware CGRA. In 2023 IEEE\/ACM International Conference on Computer Aided Design (ICCAD). IEEE, 1--9."},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2021.3081074"},{"key":"e_1_3_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD50377.2020.00070"},{"key":"e_1_3_2_1_61_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1388--1393","author":"Tan Cheng","year":"2021","unstructured":"Cheng Tan, Chenhao Xie, Ang Li, Kevin J Barker, and Antonino Tumeo. 2021. Aurora: Automated refinement of coarse-grained reconfigurable accelerators. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1388--1393."},{"key":"e_1_3_2_1_62_1","volume-title":"Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems.","author":"Thilini Kaushalya Bandara","year":"2022","unstructured":"Kaushalya Bandara Thilini, Dhananjaya Wijerathne, Tulika Mitra, and Li-Shiuan Peh. 2022. REVAMP: A Systematic Framework for Heterogeneous CGRA Realization. In Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems."},{"key":"e_1_3_2_1_63_1","volume-title":"Ultra-Elastic CGRAs for Irregular Loop Specialization. In 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 412--425","author":"Torng Christopher","year":"2021","unstructured":"Christopher Torng, Peitian Pan, Yanghui Ou, Cheng Tan, and Christopher Batten. 2021. Ultra-Elastic CGRAs for Irregular Loop Specialization. In 2021 IEEE International Symposium on High-Performance Computer Architecture (HPCA). IEEE, 412--425."},{"key":"e_1_3_2_1_64_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00035"},{"key":"e_1_3_2_1_65_1","doi-asserted-by":"publisher","DOI":"10.1145\/2678373.2665703"},{"key":"e_1_3_2_1_66_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2018.00013"},{"key":"e_1_3_2_1_67_1","volume-title":"Power Efficient Accelerator for IoT Applications. In 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC). IEEE, 133--136","author":"Wang Bo","year":"2019","unstructured":"Bo Wang, Manupa Karunarathne, Aditi Kulkarni, Tulika Mitra, and Li-Shiuan Peh. 2019. HyCUBE: A 0.9 V 26.4 MOPS\/mW, 290 pJ\/op, Power Efficient Accelerator for IoT Applications. In 2019 IEEE Asian Solid-State Circuits Conference (A-SSCC). IEEE, 133--136."},{"key":"e_1_3_2_1_68_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCA45697.2020.00032"},{"key":"e_1_3_2_1_69_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00063"},{"key":"e_1_3_2_1_70_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCBB.2006.51"},{"key":"e_1_3_2_1_71_1","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530429"},{"key":"e_1_3_2_1_72_1","doi-asserted-by":"publisher","DOI":"10.1145\/3358177"},{"key":"e_1_3_2_1_73_1","volume-title":"Fifth Workshop on Open-Source EDA Technology (WOSET).","author":"Wijerathne Dhananjaya","year":"2022","unstructured":"Dhananjaya Wijerathne, Zhaoying Li, Manupa Karunaratne, Li-Shiuan Peh, and Tulika Mitra. 2022. Morpher: An open-source integrated compilation and simulation framework for cgra. In Fifth Workshop on Open-Source EDA Technology (WOSET)."},{"key":"e_1_3_2_1_74_1","volume-title":"Accelerating Edge AI with Morpher: An Integrated Design, Compilation and Simulation Framework for CGRAs. arXiv preprint arXiv:2309.06127","author":"Wijerathne Dhananjaya","year":"2023","unstructured":"Dhananjaya Wijerathne, Zhaoying Li, and Tulika Mitra. 2023. Accelerating Edge AI with Morpher: An Integrated Design, Compilation and Simulation Framework for CGRAs. arXiv preprint arXiv:2309.06127 (2023)."},{"key":"e_1_3_2_1_75_1","volume-title":"Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1192--1197","author":"Wijerathne Dhananiaya","year":"2021","unstructured":"Dhananiaya Wijerathne, Zhaoying Li, Anuj Pathania, Tulika Mitra, and Lothar Thiele. 2021. Himap: Fast and scalable high-quality mapping on CGRA via hierarchical abstraction. In 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE). IEEE, 1192--1197."},{"key":"e_1_3_2_1_76_1","doi-asserted-by":"publisher","DOI":"10.1145\/3579843"},{"key":"e_1_3_2_1_77_1","doi-asserted-by":"publisher","DOI":"10.1145\/3307650.3322249"}],"event":{"name":"ASPLOS '25: 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems","location":"Rotterdam Netherlands","acronym":"ASPLOS '25","sponsor":["SIGPLAN ACM Special Interest Group on Programming Languages","SIGOPS ACM Special Interest Group on Operating Systems","SIGARCH ACM Special Interest Group on Computer Architecture"]},"container-title":["Proceedings of the 30th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 1"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3669940.3707230","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3669940.3707230","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,21]],"date-time":"2025-08-21T14:48:08Z","timestamp":1755787688000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3669940.3707230"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,30]]},"references-count":77,"alternative-id":["10.1145\/3669940.3707230","10.1145\/3669940"],"URL":"https:\/\/doi.org\/10.1145\/3669940.3707230","relation":{},"subject":[],"published":{"date-parts":[[2025,3,30]]},"assertion":[{"value":"2025-03-30","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}