{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,21]],"date-time":"2025-11-21T11:33:26Z","timestamp":1763724806584,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":49,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,10,27]],"date-time":"2024-10-27T00:00:00Z","timestamp":1729987200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"DOI":"10.13039\/501100001381","name":"National Research Foundation Singapore","doi-asserted-by":"publisher","award":["NRF-CRP23-2019-0003"],"award-info":[{"award-number":["NRF-CRP23-2019-0003"]}],"id":[{"id":"10.13039\/501100001381","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,10,27]]},"DOI":"10.1145\/3676536.3676777","type":"proceedings-article","created":{"date-parts":[[2025,4,9]],"date-time":"2025-04-09T12:53:56Z","timestamp":1744203236000},"page":"1-9","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Sustainable Hardware Specialization"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0004-1339-6048","authenticated-orcid":false,"given":"Pranav","family":"Dangi","sequence":"first","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3413-136X","authenticated-orcid":false,"given":"Thilini Kaushalya","family":"Bandara","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9554-7599","authenticated-orcid":false,"given":"Saeideh","family":"Sheikhpour","sequence":"additional","affiliation":[{"name":"Ghent University, Ghent, Belgium"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4136-4188","authenticated-orcid":false,"given":"Tulika","family":"Mitra","sequence":"additional","affiliation":[{"name":"National University of Singapore, Singapore, Singapore"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8792-4473","authenticated-orcid":false,"given":"Lieven","family":"Eeckhout","sequence":"additional","affiliation":[{"name":"Ghent University, Ghent, Belgium"}]}],"member":"320","published-online":{"date-parts":[[2025,4,9]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"crossref","unstructured":"B. Alcott. 2005. Jevons' Paradox. Ecological Economics 54 1 (2005).","DOI":"10.1016\/j.ecolecon.2005.03.020"},{"volume-title":"4th Gen AMD EPYC Processor Architecture. https:\/\/www.amd.com\/system\/files\/documents\/4th-gen-epyc-processor-architecture-white-paper.pdf","author":"MD.","key":"e_1_3_2_1_2_1","unstructured":"AMD. 2023. 4th Gen AMD EPYC Processor Architecture. https:\/\/www.amd.com\/system\/files\/documents\/4th-gen-epyc-processor-architecture-white-paper.pdf"},{"key":"e_1_3_2_1_3_1","unstructured":"Apple. 2022. Apple unveils M2 taking the breakthrough performance and capabilities of M1 even further. https:\/\/www.apple.com\/newsroom\/2022\/06\/apple-unveils-m2-with-breakthrough-performance-and-capabilities\/"},{"key":"e_1_3_2_1_4_1","unstructured":"C. Banbury V. J. Reddi P. Torelli J. Holleman N. Jeffries C. Kiraly P. Montino D. Kanter S. Ahmed D. Pau U. Thakker A. Torrini P. Warden J. Cordaro G. Di Guglielmo J. Duarte S. Gibellini V. Parekh H. Tran N. Tran N. Wenxu and X. Xuesong. 2021. MLPerf Tiny Benchmark. arXiv:2106.07597 [cs.LG]"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/3503222.3507772"},{"key":"e_1_3_2_1_6_1","volume-title":"FLEX: Introducing FLEXible Execution on CGRA with Spatio-Temporal Vector Dataflow. In 2023 IEEE\/ACM International Conference on Computer Aided Design (ICCAD).","author":"Bandara T. K.","year":"2023","unstructured":"T. K. Bandara, D. Wu, R. Juneja, D. Wijerathne, T. Mitra, and L-S. Peh. 2023. FLEX: Introducing FLEXible Execution on CGRA with Spatio-Temporal Vector Dataflow. In 2023 IEEE\/ACM International Conference on Computer Aided Design (ICCAD)."},{"volume-title":"Rethinking Programmable Earable Processors. In IEEE\/ACM International Symposium on Computer Architecture (ISCA). 454--467","author":"Bleier N.","key":"e_1_3_2_1_7_1","unstructured":"N. Bleier, M. H. Mubarik, S. Chakraborty, S. Kishore, and R. Kumar. 2022. Rethinking Programmable Earable Processors. In IEEE\/ACM International Symposium on Computer Architecture (ISCA). 454--467."},{"volume-title":"Programmable Olfactory Computing. In IEEE\/ACM International Symposium on Computer Architecture (ISCA). 1--14","author":"Bleier N.","key":"e_1_3_2_1_8_1","unstructured":"N. Bleier, A. Wezelis, L. R. Varshney, and R. Kumar. 2023. Programmable Olfactory Computing. In IEEE\/ACM International Symposium on Computer Architecture (ISCA). 1--14."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2017.4241347"},{"volume-title":"Proceedings of the International Green and Sustainable Computing Conference (IGSC). 1--8.","author":"Brunvand E.","key":"e_1_3_2_1_10_1","unstructured":"E. Brunvand, D. Kline, and A. K. Jones. 2019. Dark Silicon Considered Harmful: A Case for Truly Green Computing. In Proceedings of the International Green and Sustainable Computing Conference (IGSC). 1--8."},{"volume-title":"2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 70--71","author":"Carsello A.","key":"e_1_3_2_1_11_1","unstructured":"A. Carsello, K. Feng, T. Kong, K. Koul, Q. Liu, J. Melchert, G. Nyengele, M. Strange, K. Zhang, A. Nayak, J. Setter, J. Thomas, K. Sreedhar, P-H Chen, N. Bhagdikar, Z. Myers, B. D'Agostino, P. Joshi, S. Richardson, R. Bahr, C. Torng, M. Horowitz, and P. Raina. 2022. Amber: A 367 GOPS, 538 GOPS\/W 16nm SoC with a CoarseGrained Reconfigurable Array for Flexible Acceleration of Dense Linear Algebra. In 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits). 70--71."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2019.2910232"},{"key":"e_1_3_2_1_13_1","unstructured":"A. Chowdhery P. Warden J. Shlens A. Howard and R. Rhodes. 2019. Visual Wake Words Dataset. arXiv:1906.05721 [cs.CV]"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1974.1050511"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2022.3218034"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/3620665.3640415"},{"volume-title":"Proceedings of the IEEE\/ACM International Symposium on Computer Architecture (ISCA). 365--376","author":"Esmaeilzadeh H.","key":"e_1_3_2_1_17_1","unstructured":"H. Esmaeilzadeh, E. M. Blem, R. S. Amant, K. Sankaralingam, and D. Burger. 2011. Dark Silicon and the End of Multicore Scaling. In Proceedings of the IEEE\/ACM International Symposium on Computer Architecture (ISCA). 365--376."},{"key":"e_1_3_2_1_18_1","first-page":"558","article-title":"Processors, methods, and systems with a configurable spatial accelerator","volume":"10","author":"Fleming E","year":"2020","unstructured":"Kermin E Fleming and et al. 2020. Processors, methods, and systems with a configurable spatial accelerator. US Patent 10,558,575.","journal-title":"US Patent"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"crossref","unstructured":"C. Freitag M. Berbers-Lee K. Widdicks B. Knowles G. S. Blair and A. Friday. 2021. The Real Climate and Transformative Impact of ICT: A Critique of Estimates Trends and Regulations. Patterns 2 9 (2021).","DOI":"10.1016\/j.patter.2021.100340"},{"volume-title":"New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications. In VLSI'18","key":"e_1_3_2_1_20_1","unstructured":"Taro Fujii and et al. [n. d.]. New Generation Dynamically Reconfigurable Processor Technology for Accelerating Embedded AI Applications. In VLSI'18. 41--42."},{"issue":"4","key":"e_1_3_2_1_21_1","first-page":"1","article-title":"DTCO including sustainability: Power-performance-area-cost-environmental score (PPACE) analysis for logic technologies","volume":"41","author":"Garcia Bardon M","year":"2020","unstructured":"M Garcia Bardon, P Wuytens, L-A Ragnarsson, G Mirabelli, D Jang, G Willems, A Mallik, A Spessot, J Ryckaert, and B Parvais. 2020. DTCO including sustainability: Power-performance-area-cost-environmental score (PPACE) analysis for logic technologies. In IEEE International Electron Devices Meeting (IEDM). 41.4.1--41.4.4.","journal-title":"IEEE International Electron Devices Meeting (IEDM)."},{"volume-title":"Energy-Minimal CGRA-Generation Framework and Architecture. In 2021 ACM\/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). 1027--1040","author":"Gobieski G.","key":"e_1_3_2_1_22_1","unstructured":"G. Gobieski, A. O. Atli, K. Mai, B. Lucia, and N. Beckmann. 2021. Snafu: An Ultra-Low-Power, Energy-Minimal CGRA-Generation Framework and Architecture. In 2021 ACM\/IEEE 48th Annual International Symposium on Computer Architecture (ISCA). 1027--1040."},{"volume-title":"Energy-Minimal Dataflow Compiler and Architecture. In 2022 55th IEEE\/ACM International Symposium on Microarchitecture (MICRO). 546--564","author":"Gobieski G.","key":"e_1_3_2_1_23_1","unstructured":"G. Gobieski, S. Ghosh, M. Heule, T. Mowry, T. Nowatzki, N. Beckmann, and B. Lucia. 2022. RipTide: A Programmable, Energy-Minimal Dataflow Compiler and Architecture. In 2022 55th IEEE\/ACM International Symposium on Microarchitecture (MICRO). 546--564."},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/3470496.3527408"},{"key":"e_1_3_2_1_25_1","volume-title":"Chasing Carbon: The Elusive Environmental Footprint of Computing. In IEEE International Symposium on High-Performance Computer Architecture (HPCA). 854--867","author":"Gupta U","year":"2021","unstructured":"U Gupta, Y G Kim, S Lee, J Tse, H-H S Lee, G-Y Wei, D Brooks, and C-J Wu. 2021. Chasing Carbon: The Elusive Environmental Footprint of Computing. In IEEE International Symposium on High-Performance Computer Architecture (HPCA). 854--867."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/3282307"},{"volume-title":"Roofline Model for MobilGables: Aes SoCs. In IEEE International Symposium on High-Performance Computer Architecture (HPCA). 317--330","author":"Hill M. D.","key":"e_1_3_2_1_27_1","unstructured":"M. D. Hill and V. J. Reddi. 2019. Roofline Model for MobilGables: Aes SoCs. In IEEE International Symposium on High-Performance Computer Architecture (HPCA). 317--330."},{"volume-title":"Hardware-Software Co-Design for Brain-Computer Interfaces. In IEEE\/ACM International Symposium on Computer Architecture (ISCA).","key":"e_1_3_2_1_28_1","unstructured":"Karageorgos I., Sriram K., Vesely J., Wu M., Powel M., Borton D., Manohar R., and Bhattacharjee A. 2020. Hardware-Software Co-Design for Brain-Computer Interfaces. In IEEE\/ACM International Symposium on Computer Architecture (ISCA)."},{"key":"e_1_3_2_1_29_1","unstructured":"IBM. 2021. IBM Telum Processor: The next-gen microprocessor for IBM Z and IBM LinuxONE. https:\/\/www.ibm.com\/blog\/ibm-telum-processor-the-next-gen-microprocessor-for-ibm-z-and-ibm-linuxone\/"},{"volume-title":"Technical Overview Of The 4th Gen Intel Xeon Scalable processor family. https:\/\/www.intel.com\/content\/www\/us\/en\/developer\/articles\/technical\/fourth-generation-xeon-scalable-family-overview.html","key":"e_1_3_2_1_30_1","unstructured":"Intel. 2022. Technical Overview Of The 4th Gen Intel Xeon Scalable processor family. https:\/\/www.intel.com\/content\/www\/us\/en\/developer\/articles\/technical\/fourth-generation-xeon-scalable-family-overview.html"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062262"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2012.6412157"},{"key":"e_1_3_2_1_33_1","volume-title":"Sustainable Computing: Informatics and Systems 22 (June","author":"Kline D.","year":"2019","unstructured":"D. Kline, N. Parshook, X. Ge, E. Brunvand, R. G. Melhem, P. K. Chrysanthis, and A. K. Jones. 2019. GreenChip: A tool for evaluating holistic sustainability of modern computing systems. Sustainable Computing: Informatics and Systems 22 (June 2019), 322--332."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.884574"},{"key":"e_1_3_2_1_35_1","volume-title":"Cradle-to-gate Life Cycle Assessment of CMOS Logic Technologies. In IEEE International Electron Devices Meeting (IEDM). 1--4.","author":"L, G.","year":"2023","unstructured":"Boakes L, G. Bardon M, Schellekens V, Rolin C, Liu I-Y Vanhoucke B, Mirabelli G, Sebaai F, V. Winckel L, Gallagher E, and Ragnarsson L-A. 2023. Cradle-to-gate Life Cycle Assessment of CMOS Logic Technologies. In IEEE International Electron Devices Meeting (IEDM). 1--4."},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"publisher","unstructured":"B. Mei S. Vernalde D. Verkest H. Man and R. Lauwereins. [n. d.]. ADRES: An Architecture with Tightly Coupled VLIW Processor and Coarse-Grained Reconfigurable Matrix. In FPL'03. 10.1007\/978-3-540-45234-8_7","DOI":"10.1007\/978-3-540-45234-8_7"},{"volume-title":"STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators. In 2021 IEEE International Symposium on Workload Characterization (IISWC).","author":"Mu\u00f1oz-Mart\u00ednez F.","key":"e_1_3_2_1_37_1","unstructured":"F. Mu\u00f1oz-Mart\u00ednez, J. L. Abell\u00e1n, M. E. Acacio, and T. Krishna. 2021. STONNE: Enabling Cycle-Level Microarchitectural Simulation for DNN Inference Accelerators. In 2021 IEEE International Symposium on Workload Characterization (IISWC)."},{"volume-title":"Fifer: Practical Acceleration of Irregular Applications on Reconfigurable Architectures. In MICRO-54: 54th Annual IEEE\/ACM International Symposium on Microarchitecture. 1064--1077","author":"Nguyen Q. M.","key":"e_1_3_2_1_38_1","unstructured":"Q. M. Nguyen and D. Sanchez. 2021. Fifer: Practical Acceleration of Irregular Applications on Reconfigurable Architectures. In MICRO-54: 54th Annual IEEE\/ACM International Symposium on Microarchitecture. 1064--1077."},{"volume-title":"2017 ACM\/IEEE 44th Annual International Symposium on Computer Architecture (ISCA). 416--429","author":"Nowatzki T.","key":"e_1_3_2_1_39_1","unstructured":"T. Nowatzki, V. Gangadhar, N. Ardalani, and K. Sankaralingam. 2017. Stream-dataflow acceleration. In 2017 ACM\/IEEE 44th Annual International Symposium on Computer Architecture (ISCA). 416--429."},{"volume-title":"Proceedings of the 44th Annual International Symposium on Computer Architecture. 389--402","author":"Prabhakar R.","key":"e_1_3_2_1_40_1","unstructured":"R. Prabhakar, Y. Zhang, D. Koeplinger, M. Feldman, T. Zhao, S. Hadjis, A. Pedram, C. Kozyrakis, and K. Olukotun. 2017. Plasticine: A Reconfigurable Architecture For Parallel Paterns. In Proceedings of the 44th Annual International Symposium on Computer Architecture. 389--402."},{"key":"e_1_3_2_1_41_1","unstructured":"Qualcomm. 2022. Snapdragon 6 Gen 1 Mobile Platform. https:\/\/www.qualcomm.com\/content\/dam\/qcomm-martech\/dm-assets\/documents\/09162022_Prod_Brief_QCOM_SD_6_Gen_1.pdf"},{"volume-title":"MachSuite: Benchmarks for Accelerator Design and Customized Architectures. In IISWC'14","author":"Reagen B.","key":"e_1_3_2_1_42_1","unstructured":"B. Reagen, R. Adolf, Y. S. Shao, G-Y Wei, and D. Brooks. 2014. MachSuite: Benchmarks for Accelerator Design and Customized Architectures. In IISWC'14."},{"volume-title":"Proceedings of the IEEE\/ACM International Symposium on Computer Architecture (ISCA). 97--108","author":"Y. S.","key":"e_1_3_2_1_43_1","unstructured":"Shao Y. S., Reagen B., G.-Y. Wei, and D. M. Brooks. 2014. Aladdin: A pre-RTL, power-performance accelerator simulator enabling large design space exploration of customized architecture. In Proceedings of the IEEE\/ACM International Symposium on Computer Architecture (ISCA). 97--108."},{"key":"e_1_3_2_1_44_1","volume-title":"RETROSPECTIVE: Aladdin: a Pre-RTL, Power-Performance Accelerator Simulator Enabling Large Design Space Exploration of Customized Architectures. In ISCA@50 25-Year Retrospective: 1996--2020, Jos\u00e9 F","author":"Shao Y. S.","year":"2023","unstructured":"Y. S. Shao, B. Reagen, G.-Y. Wei, and D. Brooks. 2023. RETROSPECTIVE: Aladdin: a Pre-RTL, Power-Performance Accelerator Simulator Enabling Large Design Space Exploration of Customized Architectures. In ISCA@50 25-Year Retrospective: 1996--2020, Jos\u00e9 F. Mart\u00ednez and Lizy K. John (Eds.). ACM SIGARCH and IEEE TCCA. https:\/\/bit.ly\/isca50_retrospective"},{"volume-title":"Ultra-Elastic CGRAs for Irregular Loop Specialization. In 2021 IEEE International Symposium on HighPerformance Computer Architecture (HPCA). 412--425","author":"Torng C.","key":"e_1_3_2_1_45_1","unstructured":"C. Torng, P. Pan, Y. Ou, C. Tan, and C. Batten. 2021. Ultra-Elastic CGRAs for Irregular Loop Specialization. In 2021 IEEE International Symposium on HighPerformance Computer Architecture (HPCA). 412--425."},{"volume-title":"Proceedings of the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). 205--218","author":"Venkatesh G.","key":"e_1_3_2_1_46_1","unstructured":"G. Venkatesh, J. Sampson, N. Goulding, S. Garcia, V. Bryksin, J. Lugo-Martinez, S. Swanson, and M. B. Taylor. 2010. Conservation Cores: Reducing the Energy of Mature Computations. In Proceedings of the ACM International Conference on Architectural Support for Programming Languages and Operating Systems (ASPLOS). 205--218."},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"publisher","DOI":"10.1145\/3358177"},{"key":"e_1_3_2_1_48_1","unstructured":"D. Wijerathne Z. Li M. Karunaratne L-S Peh and T. Mitra. [n. d.]. Morpher: An Open-Source Integrated Compilation and Simulation Framework for CGRA. WOSET'22 ([n. d.])."},{"volume-title":"Proceedings of the 19th ACM\/SIGDA International Symposium on Field Programmable Gate Arrays. 5--14","author":"Wong H.","key":"e_1_3_2_1_49_1","unstructured":"H. Wong, V. Betz, and J. Rose. 2011. Comparing FPGA vs. custom cmos and the impact on processor microarchitecture. In Proceedings of the 19th ACM\/SIGDA International Symposium on Field Programmable Gate Arrays. 5--14."}],"event":{"name":"ICCAD '24: 43rd IEEE\/ACM International Conference on Computer-Aided Design","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CEDA","IEEE EDS"],"location":"Newark Liberty International Airport Marriott New York NY USA","acronym":"ICCAD '24"},"container-title":["Proceedings of the 43rd IEEE\/ACM International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3676536.3676777","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3676536.3676777","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T23:43:58Z","timestamp":1750290238000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3676536.3676777"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,27]]},"references-count":49,"alternative-id":["10.1145\/3676536.3676777","10.1145\/3676536"],"URL":"https:\/\/doi.org\/10.1145\/3676536.3676777","relation":{},"subject":[],"published":{"date-parts":[[2024,10,27]]},"assertion":[{"value":"2025-04-09","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}