{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,12]],"date-time":"2026-05-12T16:20:14Z","timestamp":1778602814057,"version":"3.51.4"},"publisher-location":"New York, NY, USA","reference-count":37,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,10,27]],"date-time":"2024-10-27T00:00:00Z","timestamp":1729987200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100006785","name":"Google","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006785","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National Science and Technology Council of Taiwan"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,10,27]]},"DOI":"10.1145\/3676536.3676818","type":"proceedings-article","created":{"date-parts":[[2025,4,9]],"date-time":"2025-04-09T13:21:20Z","timestamp":1744204880000},"page":"1-9","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["Modern Fixed-Outline Floorplanning with Rectilinear Soft Modules"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0009-2588-5515","authenticated-orcid":false,"given":"Yu-Yang","family":"Chen","sequence":"first","affiliation":[{"name":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-5921-1729","authenticated-orcid":false,"given":"Yi-Chen","family":"Lin","sequence":"additional","affiliation":[{"name":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2612-5499","authenticated-orcid":false,"given":"Tzu-Han","family":"Hsu","sequence":"additional","affiliation":[{"name":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4554-3442","authenticated-orcid":false,"given":"Iris Hui-Ru","family":"Jiang","sequence":"additional","affiliation":[{"name":"Graduate Institute of Electronics Engineering, National Taiwan University, Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-3163-3634","authenticated-orcid":false,"given":"Tung-Chieh","family":"Chen","sequence":"additional","affiliation":[{"name":"Design Technology Group, Synopsys, Inc., Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-7252-0197","authenticated-orcid":false,"given":"Tai-Chen","family":"Chen","sequence":"additional","affiliation":[{"name":"Design Technology Group, Synopsys, Inc., Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8324-0592","authenticated-orcid":false,"given":"Hua-Yu","family":"Chang","sequence":"additional","affiliation":[{"name":"Design Technology Group, Synopsys, Inc., Taipei, Taiwan"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2025,4,9]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"2007. GSRC Benchmark. Retrieved May 26 2007 from http:\/\/vlsicad.eecs.umich.edu\/BK\/GSRCbench\/"},{"key":"e_1_3_2_1_2_1","unstructured":"2007. MCNC Benchmark. Retrieved May 26 2007 from http:\/\/vlsicad.eecs.umich.edu\/BK\/MCNCbench\/"},{"key":"e_1_3_2_1_3_1","volume-title":"Retrieved","year":"2023","unstructured":"2023. CAD Contest Benchmark Suite on Fixed-Outline Floorplanning with Rectilinear Soft Blocks. Retrieved December 04, 2023 from https:\/\/drive.google.com\/file\/d\/1oFAoYKMvhQwvJ0MH4R1yxnDWcxxarsNv\/view?usp=sharing"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817546"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/1055137.1055164"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530617"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337541"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1137\/0614081"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF01386390"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.825877"},{"key":"e_1_3_2_1_11_1","volume-title":"MediaTek Delivers Efficient Cortex-X2. Retrieved","author":"Gwennap Linley","year":"2022","unstructured":"Linley Gwennap. 2022. MediaTek Delivers Efficient Cortex-X2. Retrieved August 1, 2022 from https:\/\/www.eetasia.com\/express\/mediatek-delivers-efficient-cortex-x2\/"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSSC.1968.300136"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD50377.2020.00061"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2226584"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1145\/2024724.2024875"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD57390.2023.10323841"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1145\/332357.332401"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/3505170.3506731"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.23919\/DATE56975.2023.10137175"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731536"},{"key":"e_1_3_2_1_21_1","volume-title":"Kingma and Jimmy Ba","author":"Diederik","year":"2017","unstructured":"Diederik P. Kingma and Jimmy Ba. 2017. Adam: A Method for Stochastic Optimization. arXiv:1412.6980 [cs.LG]"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1126\/science.220.4598.671"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/A-SSCC56115.2022.9980637"},{"key":"e_1_3_2_1_24_1","doi-asserted-by":"publisher","DOI":"10.1145\/157485.165014"},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1109\/DAC56929.2023.10247967"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3213609"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/378239.379062"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419821"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2114531"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2008.4483939"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","unstructured":"Azalia Mirhoseini Anna Goldie Mustafa Yazgan Joe Wenjie Jiang Ebrahim Songhori Shen Wang Young-Joon Lee Eric Johnson Omkar Pathak Azade Nazi Jiwoo Pak Andy Tong Kavya Srinivasa William Hang Emre Tuncer Quoc V. Le James Laudon Richard Ho Roger Carpenter and Jeff Dean. 2021. A graph placement methodology for fast chip design. Nature 594 (June 2021) 207--212. 10.1038\/s41586-021-03544-w","DOI":"10.1038\/s41586-021-03544-w"},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1995.480159"},{"key":"e_1_3_2_1_33_1","volume-title":"Filed Dec. 16.","author":"Naylor William C.","year":"1998","unstructured":"William C. Naylor, Ross Donelly, and Lu Sha. 2001. Non-linear optimization system and method for wire length and dealy optimization for an automatic electric circuit placer. US Patent No. 6,301,693, Filed Dec. 16., 1998, Issued Oct. 9., 2001."},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317782"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2004.1337536"},{"key":"e_1_3_2_1_36_1","volume-title":"Electronic Design Automation: Synthesis, Verification, and Test. Morgan Kaufmann","author":"Wang Laung-Terng","unstructured":"Laung-Terng Wang, Kwang-Ting (Tim) Cheng, and Yao-Wen Chang. 2009. Electronic Design Automation: Synthesis, Verification, and Test. Morgan Kaufmann, Burlington, MA, USA."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2021.3131550"}],"event":{"name":"ICCAD '24: 43rd IEEE\/ACM International Conference on Computer-Aided Design","location":"Newark Liberty International Airport Marriott New York NY USA","acronym":"ICCAD '24","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CEDA","IEEE EDS"]},"container-title":["Proceedings of the 43rd IEEE\/ACM International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3676536.3676818","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3676536.3676818","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:18:44Z","timestamp":1750295924000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3676536.3676818"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,27]]},"references-count":37,"alternative-id":["10.1145\/3676536.3676818","10.1145\/3676536"],"URL":"https:\/\/doi.org\/10.1145\/3676536.3676818","relation":{},"subject":[],"published":{"date-parts":[[2024,10,27]]},"assertion":[{"value":"2025-04-09","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}