{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,28]],"date-time":"2025-11-28T17:02:18Z","timestamp":1764349338130,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":36,"publisher":"ACM","license":[{"start":{"date-parts":[[2024,10,27]],"date-time":"2024-10-27T00:00:00Z","timestamp":1729987200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2024,10,27]]},"DOI":"10.1145\/3676536.3676821","type":"proceedings-article","created":{"date-parts":[[2025,4,9]],"date-time":"2025-04-09T13:21:20Z","timestamp":1744204880000},"page":"1-8","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["ASCENT: Amplifying Power Side-Channel Resilience via Learning &amp; Monte-Carlo Tree Search"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1017-1690","authenticated-orcid":false,"given":"Jitendra","family":"Bhandari","sequence":"first","affiliation":[{"name":"New York University, Brooklyn, New York, United States"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5869-1751","authenticated-orcid":false,"given":"Animesh Basak","family":"Chowdhury","sequence":"additional","affiliation":[{"name":"New York University, Brooklyn, New York, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0782-0397","authenticated-orcid":false,"given":"Ozgur","family":"Sinanoglu","sequence":"additional","affiliation":[{"name":"New York University Abu Dhabi, Abu Dhabi, United Arab Emirates"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6158-9512","authenticated-orcid":false,"given":"Siddharth","family":"Garg","sequence":"additional","affiliation":[{"name":"New York University, Brooklyn, New York, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7989-5617","authenticated-orcid":false,"given":"Ramesh","family":"Karri","sequence":"additional","affiliation":[{"name":"New York University, Brooklyn, New York, USA"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5093-2939","authenticated-orcid":false,"given":"Johann","family":"Knechtel","sequence":"additional","affiliation":[{"name":"New York University Abu Dhabi, Abu Dhabi, United Arab Emirates"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2025,4,9]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"crossref","unstructured":"Massimo Alioto et al. 2010. Leakage Power Analysis Attacks: A Novel Class of Attacks to Nanometer Cryptographic Circuits. IEEE TCAS 355--367.","DOI":"10.1109\/TCSI.2009.2019411"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"crossref","unstructured":"Ziyad Almohaimeed et al. 2015. Secured-by-design FPGA: look-up tables and switch-boxes. In NORCAS 1--4.","DOI":"10.1109\/NORCHIP.2015.7364404"},{"key":"e_1_3_2_1_3_1","first-page":"45288","article-title":"Towards a comprehensive benchmark for high-level synthesis targeted to fpgas","volume":"36","author":"Yunsheng Bai","year":"2023","unstructured":"Yunsheng Bai et al. 2023. Towards a comprehensive benchmark for high-level synthesis targeted to fpgas. NeurIPS, 36, 45288--45299.","journal-title":"NeurIPS"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"crossref","unstructured":"Animesh Basak Chowdhury et al. 2023. ALMOST: adversarial learning to mitigate oracle-less ml attacks via synthesis tuning. DAC 1--6.","DOI":"10.1109\/DAC56929.2023.10247921"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"crossref","unstructured":"Davide Bellizia et al. 2021. SC-DDPL as a Countermeasure against Static Power Side-Channel Attacks. Cryptography.","DOI":"10.3390\/cryptography5030016"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"crossref","unstructured":"Davide Bellizia et al. 2020. SC-DDPL: A Novel Standard-Cell Based Approach for Counteracting Power Analysis Attacks in the Presence of Unbalanced Routing. IEEE TCAS 2317--2330.","DOI":"10.1109\/TCSI.2020.2979831"},{"key":"e_1_3_2_1_7_1","unstructured":"Jitendra Bhandari et al. 2023. Beware your standard cells! on their role in static power side-channel attacks. Cryptology ePrint Archive Paper 2023\/920. (2023)."},{"key":"e_1_3_2_1_8_1","unstructured":"Jitendra Bhandari et al. 2024. Lightweight Masking Against Static Power Side-Channel Attacks. arXiv preprint arXiv:2402.03196."},{"key":"e_1_3_2_1_9_1","volume-title":"ABC: An academic industrial-strength verification tool. In CAV, 24--40.","author":"Robert Brayton","year":"2010","unstructured":"Robert Brayton et al. 2010. ABC: An academic industrial-strength verification tool. In CAV, 24--40."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"crossref","unstructured":"Eric Brier et al. 2004. Correlation Power Analysis with a Leakage Model. In IACR CHES 16--29.","DOI":"10.1007\/978-3-540-28632-5_2"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","unstructured":"Ileana Buhan et al. 2022. SoK: Design Tools for Side-Channel-Aware Implementations. In AsiaCCS 756--770.","DOI":"10.1145\/3488932.3517415"},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"crossref","unstructured":"Tianqi Chen et al. 2016. Xgboost: a scalable tree boosting system. In ACM SIGKDD 785--794.","DOI":"10.1145\/2939672.2939785"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","unstructured":"Animesh Basak Chowdhury et al. 2022. Bulls-eye: active few-shot learning guided logic synthesis. IEEE TCAD.","DOI":"10.1109\/TCAD.2022.3226668"},{"key":"e_1_3_2_1_14_1","unstructured":"Animesh Basak Chowdhury et al. 2021. Openabc-d: a large-scale dataset for machine learning guided integrated circuit synthesis. arXiv preprint arXiv:2110.11292."},{"key":"e_1_3_2_1_15_1","unstructured":"Animesh Basak Chowdhury et al. 2024. Retrieval-guided reinforcement learning for boolean circuit minimization. arXiv preprint arXiv:2401.12205."},{"key":"e_1_3_2_1_16_1","unstructured":"Matthew DeLorenzo et al. 2024. Make every move count: LLM-based high-quality rtl code generation using MCTS."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"crossref","unstructured":"Milena Djukanovic et al. 2017. Multivariate Analysis Exploiting Static Power on Nanoscale CMOS Circuits for Cryptographic Applications. In AFRICACRYPT.","DOI":"10.1007\/978-3-319-57339-7_5"},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"crossref","unstructured":"Jacopo Giorgetti et al. 2007. Analysis of Data Dependence of Leakage Current in CMOS Cryptographic Hardware. In GLSVLSI 78--83.","DOI":"10.1145\/1228784.1228808"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"crossref","unstructured":"Miao He et al. 2019. RTL-PSC: Automated Power Side-Channel Leakage Assessment at Register-Transfer Level. In VTS 1--6.","DOI":"10.1109\/VTS.2019.8758600"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"crossref","unstructured":"Abdelrahman Hosny et al. 2020. Drills: deep reinforcement learning for logic synthesis. In 2020 25th ASP-DAC. IEEE 581--586.","DOI":"10.1109\/ASP-DAC47756.2020.9045559"},{"key":"e_1_3_2_1_21_1","doi-asserted-by":"crossref","unstructured":"D. Jayasinghe et al. 2015. QuadSeal: Quadruple algorithmic symmetrizing countermeasure against power based side-channel attacks. In CASES 21--30.","DOI":"10.1109\/CASES.2015.7324539"},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"crossref","unstructured":"Naghmeh Karimi et al. 2019. Exploring the Effect of Device Aging on Static Power Analysis Attacks. TCHES 233--256.","DOI":"10.46586\/tches.v2019.i3.233-256"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"crossref","unstructured":"Johann Knechtel et al. 2022. Design-time exploration of voltage switching against power analysis attacks in 14 nm FinFET technology. Integration 27--34.","DOI":"10.1016\/j.vlsi.2022.02.006"},{"key":"e_1_3_2_1_24_1","volume-title":"Kocher et al","author":"Paul C.","year":"1999","unstructured":"Paul C. Kocher et al. 1999. Differential Power Analysis. In CRYPTO, 388--397."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"crossref","unstructured":"Thorben Moos et al. 2021. Countermeasures against Static Power Attacks:-Comparing Exhaustive Logic Balancing and Other Protection Schemes in 28nm CMOS. IACR CHES 780--805.","DOI":"10.46586\/tches.v2021.i3.780-805"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"crossref","unstructured":"Thorben Moos et al. 2017. Static Power Side-Channel Analysis of a Threshold Implementation Prototype Chip. In DATE 1324--1329.","DOI":"10.23919\/DATE.2017.7927198"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"crossref","unstructured":"Amir Moradi et al. 2014. Side-Channel Leakage through Static Power. In CHES 562--579.","DOI":"10.1007\/978-3-662-44709-3_31"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"crossref","unstructured":"Zehua Pei et al. 2023. Alphasyn: logic synthesis optimization with efficient monte carlo tree search. In ICCAD. IEEE 1--9.","DOI":"10.1109\/ICCAD57390.2023.10323856"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"crossref","unstructured":"Thomas Popp et al. 2005. Masked dual-rail pre-charge logic: dpa-resistance without routing constraints. In CHES. Springer Berlin Heidelberg Berlin Heidelberg 172--186. ISBN: 978-3-540-31940-5.","DOI":"10.1007\/11545262_13"},{"key":"e_1_3_2_1_30_1","first-page":"2","article-title":"Power side-channel attack analysis: a review of 20 years of study for the layman","volume":"4","author":"Mark Randolph","year":"2020","unstructured":"Mark Randolph et al. 2020. Power side-channel attack analysis: a review of 20 years of study for the layman. Cryptography, 4, 2.","journal-title":"Cryptography"},{"key":"e_1_3_2_1_31_1","volume-title":"Karna: A Gate-Sizing based Security Aware EDA Flow for Improved Power Side-Channel Attack Protection. In ICCAD, 1--8.","author":"Patanjali Slpsk","year":"2019","unstructured":"Patanjali Slpsk et al. 2019. Karna: A Gate-Sizing based Security Aware EDA Flow for Improved Power Side-Channel Attack Protection. In ICCAD, 1--8."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"crossref","unstructured":"Saideep Sreekumar et al. 2023. X-volt: joint tuning of driver strengths and supply voltages against power side-channel attacks. In ISPD 238--246.","DOI":"10.1145\/3569052.3571882"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"crossref","unstructured":"Kris Tiri et al. 2004. Secure Logic Synthesis. In FPGA.","DOI":"10.1007\/978-3-540-30117-2_125"},{"key":"e_1_3_2_1_34_1","unstructured":"Clifford Wolf et al. 2013. Yosys-a free verilog synthesis suite. In Austrochip 97."},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"crossref","unstructured":"Cunxi Yu. 2020. Flowtune: practical multi-armed bandits in boolean optimization. In ICCAD 1--9.","DOI":"10.1145\/3400302.3415615"},{"key":"e_1_3_2_1_36_1","doi-asserted-by":"crossref","unstructured":"Keren Zhu et al. 2020. Exploring logic optimizations with reinforcement learning and graph convolutional network. In MLCAD 145--150.","DOI":"10.1145\/3380446.3430622"}],"event":{"name":"ICCAD '24: 43rd IEEE\/ACM International Conference on Computer-Aided Design","sponsor":["SIGDA ACM Special Interest Group on Design Automation","IEEE CAS","IEEE CEDA","IEEE EDS"],"location":"Newark Liberty International Airport Marriott New York NY USA","acronym":"ICCAD '24"},"container-title":["Proceedings of the 43rd IEEE\/ACM International Conference on Computer-Aided Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3676536.3676821","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3676536.3676821","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:18:44Z","timestamp":1750295924000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3676536.3676821"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,27]]},"references-count":36,"alternative-id":["10.1145\/3676536.3676821","10.1145\/3676536"],"URL":"https:\/\/doi.org\/10.1145\/3676536.3676821","relation":{},"subject":[],"published":{"date-parts":[[2024,10,27]]},"assertion":[{"value":"2025-04-09","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}