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Code Optim."],"published-print":{"date-parts":[[2024,12,31]]},"abstract":"<jats:p>\n            Parallelizing code in a shared-memory environment is commonly done utilizing loop scheduling (LS) in a fork-join manner as in OpenMP. This manner of parallelization is popular due to its ease to code, but the choice of the LS method is important when the workload per iteration is highly variable. Currently, the shared-memory environment is evolving in high-performance computing as larger chiplet-based processors with high core counts and segmented L3 cache are introduced. These processors have a stronger non-uniform memory access (NUMA) effect than the previous generation of x86-64 processors. This work attempts to modify the adaptive self-scheduling loop scheduler known as\n            <jats:italic>iCh<\/jats:italic>\n            (\n            <jats:italic>i<\/jats:italic>\n            rregular\n            <jats:italic>Ch<\/jats:italic>\n            unk) for these NUMA environments while analyzing the impact of these systems on default OpenMP LS methods. In particular,\n            <jats:italic>iCh<\/jats:italic>\n            is as a default LS method for irregular applications (i.e., applications where the workload per iteration is highly variable) that guarantees \u201cgood\u201d performance without tuning. The modified version, named\n            <jats:italic>NiCh<\/jats:italic>\n            , is demonstrated over multiple irregular applications to show the variation in performance. The work demonstrates that\n            <jats:italic>NiCh<\/jats:italic>\n            is able to better handle architectures with stronger NUMA effects, and particularly is better than\n            <jats:italic>iCh<\/jats:italic>\n            when the number of threads is greater than the number of cores. However,\n            <jats:italic>NiCh<\/jats:italic>\n            also comes with being less universally \u201cgood\u201d than\n            <jats:italic>iCh<\/jats:italic>\n            and a set of parameters that are hardware dependent.\n          <\/jats:p>","DOI":"10.1145\/3680549","type":"journal-article","created":{"date-parts":[[2024,7,26]],"date-time":"2024-07-26T11:49:55Z","timestamp":1721994595000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["A NUMA-Aware Version of an Adaptive Self-Scheduling Loop Scheduler"],"prefix":"10.1145","volume":"21","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7269-6367","authenticated-orcid":false,"given":"Joshua Dennis","family":"Booth","sequence":"first","affiliation":[{"name":"Computer Science, The University of Alabama in Huntsville, Huntsville, United States"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7996-8502","authenticated-orcid":false,"given":"Phillip","family":"Lane","sequence":"additional","affiliation":[{"name":"Computer Science, The University of Alabama in Huntsville, Huntsville, United States"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2024,11,19]]},"reference":[{"key":"e_1_3_2_2_2","doi-asserted-by":"publisher","DOI":"10.1023\/A:1023588520138"},{"key":"e_1_3_2_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2012.71"},{"key":"e_1_3_2_4_2","doi-asserted-by":"publisher","DOI":"10.1145\/3569951.3597559"},{"key":"e_1_3_2_5_2","doi-asserted-by":"publisher","DOI":"10.1002\/cpe.6750"},{"key":"e_1_3_2_6_2","doi-asserted-by":"publisher","unstructured":"S. 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