{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,31]],"date-time":"2025-12-31T12:12:33Z","timestamp":1767183153953,"version":"3.44.0"},"publisher-location":"New York, NY, USA","reference-count":69,"publisher":"ACM","license":[{"start":{"date-parts":[[2025,3,30]],"date-time":"2025-03-30T00:00:00Z","timestamp":1743292800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/"}],"funder":[{"name":"IITP","award":["RS-2021-II211343, RS-2023-00256081, RS-2024-00469698"],"award-info":[{"award-number":["RS-2021-II211343, RS-2023-00256081, RS-2024-00469698"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,3,30]]},"DOI":"10.1145\/3689031.3717471","type":"proceedings-article","created":{"date-parts":[[2025,3,26]],"date-time":"2025-03-26T06:25:20Z","timestamp":1742970320000},"page":"854-869","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["PET: Proactive Demotion for Efficient Tiered Memory Management"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8145-253X","authenticated-orcid":false,"given":"Wanju","family":"Doh","sequence":"first","affiliation":[{"name":"Seoul National University, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0972-4948","authenticated-orcid":false,"given":"Yaebin","family":"Moon","sequence":"additional","affiliation":[{"name":"Samsung Electronics, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9315-920X","authenticated-orcid":false,"given":"Seoyoung","family":"Ko","sequence":"additional","affiliation":[{"name":"Seoul National University, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-5179-625X","authenticated-orcid":false,"given":"Seunghwan","family":"Chung","sequence":"additional","affiliation":[{"name":"Seoul National University, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4243-2111","authenticated-orcid":false,"given":"Kwanhee","family":"Kyung","sequence":"additional","affiliation":[{"name":"Seoul National University, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2739-2924","authenticated-orcid":false,"given":"Eojin","family":"Lee","sequence":"additional","affiliation":[{"name":"Inha University, South Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1733-1394","authenticated-orcid":false,"given":"Jung Ho","family":"Ahn","sequence":"additional","affiliation":[{"name":"Seoul National University, South Korea"}]}],"member":"320","published-online":{"date-parts":[[2025,3,30]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/3373376.3378468"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/3037697.3037706"},{"key":"e_1_3_2_1_3_1","volume-title":"AMD64 Architecture Programmer's Manual Volume 2: System Programming. https:\/\/www.amd.com\/system\/files\/TechDocs\/24593.pdf","author":"AMD.","year":"2017","unstructured":"AMD. AMD64 Architecture Programmer's Manual Volume 2: System Programming. https:\/\/www.amd.com\/system\/files\/TechDocs\/24593.pdf, 2017."},{"key":"e_1_3_2_1_4_1","volume-title":"The GAP Benchmark Suite","author":"Beamer Scott","year":"2017","unstructured":"Scott Beamer, Krste Asanovi\u0107, and David Patterson. The GAP Benchmark Suite, 2017."},{"key":"e_1_3_2_1_5_1","first-page":"1","volume-title":"Mark Silberstein. Reconsidering OS Memory Optimizations in the Presence of Disaggregated Memory. In Proceedings of the ACM SIGPLAN International Symposium on Memory Management","author":"Bergman Shai","year":"2022","unstructured":"Shai Bergman, Priyank Faldu, Boris Grot, Llu\u00eds Vilanova, and Mark Silberstein. Reconsidering OS Memory Optimizations in the Presence of Disaggregated Memory. In Proceedings of the ACM SIGPLAN International Symposium on Memory Management, page 1--14, 2022."},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1145\/1167473.1167488"},{"key":"e_1_3_2_1_7_1","first-page":"357","volume-title":"Bovet and Marco Cesati. Understanding the Linux Kernel","author":"Daniel","year":"2007","unstructured":"Daniel P. Bovet and Marco Cesati. Understanding the Linux Kernel. San Francisco: Oreilly & Associates Inc, pages 357--362, 2007."},{"key":"e_1_3_2_1_8_1","first-page":"41","volume-title":"Kistowski. SPEC CPU2017: Next-Generation Compute Benchmark. In Companion of the ACM\/SPEC International Conference on Performance Engineering","author":"Bucek James","year":"2018","unstructured":"James Bucek, Klaus-Dieter Lange, and J\u00f3akim v. Kistowski. SPEC CPU2017: Next-Generation Compute Benchmark. In Companion of the ACM\/SPEC International Conference on Performance Engineering, page 41--42, 2018."},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"publisher","DOI":"10.1145\/3625549.3658659"},{"key":"e_1_3_2_1_10_1","volume-title":"Bin Ren. ATMem: Adaptive Data Placement in Graph Applications on Heterogeneous Memories. In Proceedings of the ACM\/IEEE International Symposium on Code Generation and Optimization","author":"Chen Yu","year":"2020","unstructured":"Yu Chen, Ivy B. Peng, Zhen Peng, Xu Liu, and Bin Ren. ATMem: Adaptive Data Placement in Graph Applications on Heterogeneous Memories. In Proceedings of the ACM\/IEEE International Symposium on Code Generation and Optimization, 2020."},{"key":"e_1_3_2_1_11_1","volume-title":"Russell Sears. Benchmarking Cloud Serving Systems with YCSB. In Proceedings of the ACM Symposium on Cloud Computing","author":"Cooper Brian F.","year":"2010","unstructured":"Brian F. Cooper, Adam Silberstein, Erwin Tam, Raghu Ramakrishnan, and Russell Sears. Benchmarking Cloud Serving Systems with YCSB. In Proceedings of the ACM Symposium on Cloud Computing, 2010."},{"key":"e_1_3_2_1_12_1","unstructured":"Compute Express Link. https:\/\/www.computeexpresslink.org."},{"key":"e_1_3_2_1_13_1","unstructured":"DaCapo descriptions and statistics. https:\/\/github.com\/dacapobench\/dacapobench\/blob\/main\/benchmarks\/doc\/dacapo-descriptions-and-statistics.pdf."},{"key":"e_1_3_2_1_14_1","volume-title":"Carvalho de Melo. Performance Counters on Linux. In Linux Plumbers Conference","author":"Arnaldo","year":"2009","unstructured":"Arnaldo Carvalho de Melo. Performance Counters on Linux. In Linux Plumbers Conference, 2009."},{"key":"e_1_3_2_1_15_1","volume-title":"Karsten Schwan. Data Tiering in Heterogeneous Memory Systems. In Proceedings of the 11th European Conference on Computer Systems","author":"Dulloor Subramanya R.","year":"2016","unstructured":"Subramanya R. Dulloor, Amitabha Roy, Zheguang Zhao, Narayanan Sundaram, Nadathur Satish, Rajesh Sankaran, Jeff Jackson, and Karsten Schwan. Data Tiering in Heterogeneous Memory Systems. In Proceedings of the 11th European Conference on Computer Systems, 2016."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/3582016.3582031"},{"key":"e_1_3_2_1_17_1","first-page":"1871","volume":"9","author":"Fan Rong-En","year":"2008","unstructured":"Rong-En Fan, Kai-Wei Chang, Cho-Jui Hsieh, Xiang-Rui Wang, and Chih-Jen Lin. LIBLINEAR: A Library for Large Linear Classification. J. Mach. Learn. Res., 9:1871--1874, jun 2008.","journal-title":"Chih-Jen Lin. LIBLINEAR: A Library for Large Linear Classification. J. Mach. Learn. Res."},{"key":"e_1_3_2_1_18_1","unstructured":"Gen-Z. https:\/\/genzconsortium.org\/."},{"key":"e_1_3_2_1_19_1","volume-title":"Greenspan. LLAMA - Automatic Memory Allocations: An LLVM Pass and Library for Automatically Determining Memory Allocations. In Proceedings of the International Symposium on Memory Systems","author":"Derrick","year":"2019","unstructured":"Derrick Greenspan. LLAMA - Automatic Memory Allocations: An LLVM Pass and Library for Automatically Determining Memory Allocations. In Proceedings of the International Symposium on Memory Systems, 2019."},{"issue":"1","key":"e_1_3_2_1_20_1","first-page":"53","volume":"71","author":"Heo Taekyung","year":"2022","unstructured":"Taekyung Heo, Yang Wang, Wei Cui, Jaehyuk Huh, and Lintao Zhang. Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems. IEEE Transactions on Computers, 71(1):53--68, 2022.","journal-title":"Lintao Zhang. Adaptive Page Migration Policy With Huge Pages in Tiered Memory Systems. IEEE Transactions on Computers"},{"key":"e_1_3_2_1_21_1","volume-title":"https:\/\/github.com\/skhynix\/hmsdk\/blob\/main\/tools\/gen_config.py","author":"SK","year":"2023","unstructured":"SK hynix. HMSDK. https:\/\/github.com\/skhynix\/hmsdk\/blob\/main\/tools\/gen_config.py, 2023."},{"key":"e_1_3_2_1_22_1","volume-title":"POWER9 Performance Monitor Unit User's Guide. https:\/\/wiki.raptorcs.com\/w\/images\/6\/6b\/POWER9_PMU_UG_v12_28NOV2018_pub.pdf","author":"IBM.","year":"2018","unstructured":"IBM. POWER9 Performance Monitor Unit User's Guide. https:\/\/wiki.raptorcs.com\/w\/images\/6\/6b\/POWER9_PMU_UG_v12_28NOV2018_pub.pdf, 2018."},{"volume-title":"Intel VTune Profiler User Guide. https:\/\/software.intel.com\/en-us\/vtune-help","year":"2020","key":"e_1_3_2_1_23_1","unstructured":"Intel. Intel VTune Profiler User Guide. https:\/\/software.intel.com\/en-us\/vtune-help, 2020."},{"key":"e_1_3_2_1_24_1","unstructured":"Intel. Intel\u00ae 64 and IA-32 Architectures Software Developer's Manual Combined Volumes 3B: System Programming Guide. https:\/\/software.intel.com\/en-us\/download\/intel-64-and-ia-32-architectures-sdm-volume-3b-system-programming-guide-part-2 2021."},{"volume-title":"https:\/\/git.kernel.org\/pub\/scm\/linux\/kernel\/git\/vishal\/tiering.git\/","year":"2021","key":"e_1_3_2_1_25_1","unstructured":"Intel. Tiering-0.72. https:\/\/git.kernel.org\/pub\/scm\/linux\/kernel\/git\/vishal\/tiering.git\/, 2021."},{"key":"e_1_3_2_1_26_1","first-page":"521","volume-title":"Karsten Schwan. HeteroOS: OS Design for Heterogeneous Memory Management in Datacenter. In Proceedings of the 44th Annual International Symposium on Computer Architecture","author":"Kannan Sudarsun","year":"2017","unstructured":"Sudarsun Kannan, Ada Gavrilovska, Vishal Gupta, and Karsten Schwan. HeteroOS: OS Design for Heterogeneous Memory Management in Datacenter. In Proceedings of the 44th Annual International Symposium on Computer Architecture, page 521--534, 2017."},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446745"},{"key":"e_1_3_2_1_28_1","unstructured":"LIBSVM Data: Classification Regression and Multi-label. https:\/\/www.csie.ntu.edu.tw\/~cjlin\/libsvmtools\/datasets\/."},{"key":"e_1_3_2_1_29_1","first-page":"12","volume-title":"Khaldi and Barbara Chapman. Towards Automatic HBM Allocation Using LLVM: A Case Study with Knights Landing. In 3rd Workshop on the LLVM Compiler Infrastructure in HPC","author":"Dounia","year":"2016","unstructured":"Dounia Khaldi and Barbara Chapman. Towards Automatic HBM Allocation Using LLVM: A Case Study with Knights Landing. In 3rd Workshop on the LLVM Compiler Infrastructure in HPC, pages 12--20, 2016."},{"key":"e_1_3_2_1_30_1","unstructured":"Honggyu Kim. DAMON based tiered memory management for CXL memory. https:\/\/lwn.net\/Articles\/978313\/."},{"key":"e_1_3_2_1_31_1","first-page":"715","volume-title":"Jeongseob Ahn. Exploring the Design Space of Page Management for Multi-Tiered Memory Systems. In USENIX Annual Technical Conference","author":"Kim Jonghyeon","year":"2021","unstructured":"Jonghyeon Kim, Wonkyo Choe, and Jeongseob Ahn. Exploring the Design Space of Page Management for Multi-Tiered Memory Systems. In USENIX Annual Technical Conference, pages 715--728, 2021."},{"issue":"02","key":"e_1_3_2_1_32_1","first-page":"20","volume":"43","author":"Kim Kyungsan","year":"2023","unstructured":"Kyungsan Kim, Hyunseok Kim, Jinin So, Wonjae Lee, Junhyuk Im, Sungjoo Park, Jeonghyeon Cho, and Hoyoung Song. SMT: Software-Defined Memory Tiering for Heterogeneous Computing Systems With CXL Memory Expander. IEEE Micro, 43(02):20--29, March 2023.","journal-title":"Hoyoung Song. SMT: Software-Defined Memory Tiering for Heterogeneous Computing Systems With CXL Memory Expander. IEEE Micro"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2019.00012"},{"key":"e_1_3_2_1_34_1","doi-asserted-by":"publisher","DOI":"10.1145\/3459898.3463907"},{"key":"e_1_3_2_1_35_1","doi-asserted-by":"crossref","unstructured":"Andres Lagar-Cavilla Junwhan Ahn Suleiman Souhlal Neha Agarwal Radoslaw Burny Shakeel Butt Jichuan Chang Ashwin Chaugule Nan Deng Junaid Shahid Greg Thelen Kamil Adam Yurtsever Yu Zhao and Parthasarathy Ranganathan. Software-Defined Far Memory in Warehouse-Scale Computers. In Proceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems pages 317--330 2019.","DOI":"10.1145\/3297858.3304053"},{"key":"e_1_3_2_1_36_1","first-page":"17","volume-title":"Young Ik Eom. MEMTIS: Efficient Memory Tiering with Dynamic Page Classification and Page Size Determination. In Proceedings of the Symposium on Operating Systems Principles","author":"Lee Taehyung","year":"2023","unstructured":"Taehyung Lee, Sumit Kumar Monga, Changwoo Min, and Young Ik Eom. MEMTIS: Efficient Memory Tiering with Dynamic Page Classification and Page Size Determination. In Proceedings of the Symposium on Operating Systems Principles, page 17--34, New York, NY, USA, 2023. Association for Computing Machinery."},{"key":"e_1_3_2_1_37_1","first-page":"211","volume-title":"Tagless DRAM Cache. In ACM\/IEEE 42nd Annual International Symposium on Computer Architecture","author":"Lee Yongjun","year":"2015","unstructured":"Yongjun Lee, Jongwon Kim, Hakbeom Jang, Hyunggyun Yang, Jangwoo Kim, Jinkyu Jeong, and Jae W Lee. A Fully Associative, Tagless DRAM Cache. In ACM\/IEEE 42nd Annual International Symposium on Computer Architecture, pages 211--222, 2015."},{"key":"e_1_3_2_1_38_1","first-page":"519","volume-title":"USENIX Symposium on Operating Systems Design and Implementation","author":"Lepers Baptiste","year":"2023","unstructured":"Baptiste Lepers and Willy Zwaenepoel. Johnny Cache: the End of DRAM Cache Conflicts (in Tiered Main Memory Systems). In USENIX Symposium on Operating Systems Design and Implementation, pages 519--534, Boston, MA, July 2023. USENIX Association."},{"key":"e_1_3_2_1_39_1","first-page":"2019","volume-title":"Looi and Jianping Jane Xu. Intel Optane Data Center Persistent Memory. In IEEE Hot Chips 31 Symposium (HCS)","author":"Lily","unstructured":"Lily Looi and Jianping Jane Xu. Intel Optane Data Center Persistent Memory. In IEEE Hot Chips 31 Symposium (HCS), pages i-xxv, 2019."},{"key":"e_1_3_2_1_40_1","first-page":"925","volume-title":"Raju Rangaswami. MULTI-CLOCK: Dynamic Tiering for Hybrid Memory Systems. In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture","author":"Maruf Adnan","year":"2022","unstructured":"Adnan Maruf, Ashikee Ghosh, Janki Bhimani, Daniel Campello, Andy Rudoff, and Raju Rangaswami. MULTI-CLOCK: Dynamic Tiering for Hybrid Memory Systems. In Proceedings of the IEEE International Symposium on High-Performance Computer Architecture, pages 925--937, 2022."},{"key":"e_1_3_2_1_41_1","doi-asserted-by":"publisher","DOI":"10.1145\/3582016.3582063"},{"key":"e_1_3_2_1_42_1","unstructured":"Multi-Generational LRU: The Next Generation. https:\/\/lwn.net\/Articles\/856931\/."},{"issue":"1","key":"e_1_3_2_1_43_1","first-page":"21","volume":"22","author":"Moon Yaebin","year":"2023","unstructured":"Yaebin Moon, Wanju Doh, Kwanhee Kyung, Eojin Lee, and Jung Ho Ahn. ADT: Aggressive Demotion and Promotion for Tiered Memory. IEEE Computer Architecture Letters, 22(1):21--24, 2023.","journal-title":"Jung Ho Ahn. ADT: Aggressive Demotion and Promotion for Tiered Memory. IEEE Computer Architecture Letters"},{"key":"e_1_3_2_1_44_1","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC55918.2022.00024"},{"key":"e_1_3_2_1_45_1","volume-title":"Introducing the Graph500","author":"Murphy Richard C","year":"2010","unstructured":"Richard C Murphy, Kyle B Wheeler, Brian W Barrett, and James A Ang. Introducing the Graph500. Cray Users Group (CUG), 19:45--74, 2010."},{"key":"e_1_3_2_1_46_1","volume-title":"Telescope: Telemetry at Terabyte Scale. arXiv:2311.10275","author":"Nair Alan","year":"2023","unstructured":"Alan Nair, Sandeep Kumar, Aravinda Prasad, Andy Rudoff, and Sreenivas Subramoney. Telescope: Telemetry at Terabyte Scale. arXiv:2311.10275, 2023."},{"key":"e_1_3_2_1_47_1","first-page":"326","volume-title":"Ayse Coskun. MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems. In IEEE International Parallel and Distributed Processing Symposium","author":"Narayan Aditya","year":"2018","unstructured":"Aditya Narayan, Tiansheng Zhang, Shaizeen Aga, Satish Narayanasamy, and Ayse Coskun. MOCA: Memory Object Classification and Allocation in Heterogeneous Memory Systems. In IEEE International Parallel and Distributed Processing Symposium, pages 326--335, 2018."},{"key":"e_1_3_2_1_48_1","doi-asserted-by":"crossref","unstructured":"Deok-Jae Oh Yaebin Moon Do Kyu Ham Tae Jun Ham Yongjun Park Jae W. Lee Jung Ho Ahn and Eojin Lee. MaPHeA: A Framework for Lightweight Memory Hierarchy-Aware Profile-Guided Heap Allocation. ACM Transactions on Embedded Computer Systems 22(1) 2022.","DOI":"10.1145\/3527853"},{"key":"e_1_3_2_1_49_1","unstructured":"Page Migration. https:\/\/lwn.net\/Articles\/157066\/."},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1145\/3445814.3446709"},{"key":"e_1_3_2_1_51_1","unstructured":"SeongJae Park. DAMON: Data Access Monitor. https:\/\/docs.kernel.org\/mm\/damon\/index.html."},{"key":"e_1_3_2_1_52_1","first-page":"392","volume-title":"Simon Peter. HeMem: Scalable Tiered Memory Management for Big Data Applications and Real NVM. In Proceedings of the ACM SIGOPS 28th Symposium on Operating Systems Principles","author":"Raybuck Amanda","year":"2021","unstructured":"Amanda Raybuck, Tim Stamler, Wei Zhang, Mattan Erez, and Simon Peter. HeMem: Scalable Tiered Memory Management for Big Data Applications and Real NVM. In Proceedings of the ACM SIGOPS 28th Symposium on Operating Systems Principles, pages 392--407, 2021."},{"volume-title":"redis.io. https:\/\/redis.io","year":"2020","key":"e_1_3_2_1_53_1","unstructured":"Redis. redis.io. https:\/\/redis.io, 2020."},{"key":"e_1_3_2_1_54_1","first-page":"803","volume-title":"Dong Li. MTM: Rethinking Memory Profiling and Migration for Multi-Tiered Large Memory. In Proceedings of the European Conference on Computer Systems","author":"Ren Jie","year":"2024","unstructured":"Jie Ren, Dong Xu, Junhee Ryu, Kwangsik Shin, Daewoo Kim, and Dong Li. MTM: Rethinking Memory Profiling and Migration for Multi-Tiered Large Memory. In Proceedings of the European Conference on Computer Systems, page 803--817, 2024."},{"key":"e_1_3_2_1_55_1","volume-title":"Jes\u00fas Labarta. Automating the Application Data Placement in Hybrid Memory Systems. In Proceedings of the IEEE International Conference on Cluster Computing","author":"Servat Harald","year":"2017","unstructured":"Harald Servat, Antonio J. Pe\u00f1a, Germ\u00e1n Llort, Estanislao Mercadal, Hans-Christian Hoppe, and Jes\u00fas Labarta. Automating the Application Data Placement in Hybrid Memory Systems. In Proceedings of the IEEE International Conference on Cluster Computing, 2017."},{"key":"e_1_3_2_1_56_1","volume-title":"Lightweight Frequency-Based Tiering for CXL Memory Systems. arXiv:2312.04789","author":"Song Kevin","year":"2023","unstructured":"Kevin Song, Jiacheng Yang, Sihang Liu, and Gennady Pekhimenko. Lightweight Frequency-Based Tiering for CXL Memory Systems. arXiv:2312.04789, 2023."},{"key":"e_1_3_2_1_57_1","doi-asserted-by":"publisher","DOI":"10.1145\/3676641.3711999"},{"key":"e_1_3_2_1_58_1","volume-title":"XSBench-The Development and Verification of a Performance Abstraction for Monte Carlo Reactor Analysis. The Role of Reactor Physics toward a Sustainable Future","author":"Tramm John R","year":"2014","unstructured":"John R Tramm, Andrew R Siegel, Tanzima Islam, and Martin Schulz. XSBench-The Development and Verification of a Performance Abstraction for Monte Carlo Reactor Analysis. The Role of Reactor Physics toward a Sustainable Future, 2014."},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA47549.2020.00059"},{"key":"e_1_3_2_1_60_1","first-page":"609","volume-title":"Dimitrios Skarlatos. TMO: Transparent Memory Offloading in Datacenters. In Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems","author":"Weiner Johannes","year":"2022","unstructured":"Johannes Weiner, Niket Agarwal, Dan Schatzberg, Leon Yang, Hao Wang, Blaise Sanouillet, Bikash Sharma, Tejun Heo, Mayank Jain, Chunqiang Tang, and Dimitrios Skarlatos. TMO: Transparent Memory Offloading in Datacenters. In Proceedings of the 27th ACM International Conference on Architectural Support for Programming Languages and Operating Systems, pages 609--621, 2022."},{"key":"e_1_3_2_1_61_1","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126923"},{"key":"e_1_3_2_1_62_1","volume-title":"Proceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis","author":"Wu Kai","year":"2018","unstructured":"Kai Wu, Jie Ren, and Dong Li. Runtime Data Management on Non-Volatile Memory-Based Heterogeneous Memory for Task-Parallel Programs. In Proceedings of the International Conference for High Performance Computing, Networking, Storage, and Analysis, 2018."},{"key":"e_1_3_2_1_63_1","first-page":"817","volume-title":"USENIX Annual Technical Conference","author":"Xu Dong","year":"2024","unstructured":"Dong Xu, Junhee Ryu, Kwangsik Shin, Pengfei Su, and Dong Li. FlexMem: Adaptive page profiling and migration for tiered memory. In USENIX Annual Technical Conference, pages 817--833, 2024."},{"key":"e_1_3_2_1_64_1","first-page":"331","volume-title":"Abhishek Bhattacharjee. Nimble Page Management for Tiered Memory Systems. In Proceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems","author":"Yan Zi","year":"2019","unstructured":"Zi Yan, Daniel Lustig, David Nellans, and Abhishek Bhattacharjee. Nimble Page Management for Tiered Memory Systems. In Proceedings of the 24th International Conference on Architectural Support for Programming Languages and Operating Systems, pages 331--345, 2019."},{"key":"e_1_3_2_1_65_1","unstructured":"Huang Ying. NUMA balancing: optimize memory placement for memory tiering system. https:\/\/lwn.net\/Articles\/849095\/."},{"key":"e_1_3_2_1_66_1","doi-asserted-by":"publisher","DOI":"10.1145\/3123939.3124555"},{"key":"e_1_3_2_1_67_1","volume-title":"Asaf Cidon. Managing Memory Tiers with CXL in Virtualized Environments. In Proceedings of the USENIX Symposium on Operating Systems Design and Implementation","author":"Zhong Yuhong","year":"2024","unstructured":"Yuhong Zhong, Daniel S Berger, Carl Waldspurger, Ishwar Agarwal, Rajat Agarwal, Frank Hady, Karthik Kumar, Mark D Hill, Mosharaf Chowdhury, and Asaf Cidon. Managing Memory Tiers with CXL in Virtualized Environments. In Proceedings of the USENIX Symposium on Operating Systems Design and Implementation, 2024."},{"key":"e_1_3_2_1_68_1","volume-title":"Toward CXL-Native Memory Tiering via Device-Side Profiling. arXiv:2403.18702v2","author":"Zhou Zhe","year":"2024","unstructured":"Zhe Zhou, Yiqi Chen, Tao Zhang, Yang Wang, Ran Shu, Shuotao Xu, Peng Cheng, Lei Qu, Yongqiang Xiong, and Guangyu Sun. Toward CXL-Native Memory Tiering via Device-Side Profiling. arXiv:2403.18702v2, 2024."},{"key":"e_1_3_2_1_69_1","first-page":"1518","volume-title":"Guangyu Sun. NeoMem: Hardware\/Software Co-Design for CXL-Native Memory Tiering. In IEEE\/ACM International Symposium on Microarchitecture","author":"Zhou Zhe","year":"2024","unstructured":"Zhe Zhou, Yiqi Chen, Tao Zhang, Yang Wang, Ran Shu, Shuotao Xu, Peng Cheng, Lei Qu, Yongqiang Xiong, Jie Zhang, and Guangyu Sun. NeoMem: Hardware\/Software Co-Design for CXL-Native Memory Tiering. In IEEE\/ACM International Symposium on Microarchitecture, pages 1518--1531, Los Alamitos, CA, USA, November 2024. IEEE Computer Society."}],"event":{"name":"EuroSys '25: Twentieth European Conference on Computer Systems","sponsor":["SIGOPS ACM Special Interest Group on Operating Systems"],"location":"Rotterdam Netherlands","acronym":"EuroSys '25"},"container-title":["Proceedings of the Twentieth European Conference on Computer Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3689031.3717471","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3689031.3717471","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,21]],"date-time":"2025-08-21T11:22:11Z","timestamp":1755775331000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3689031.3717471"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,30]]},"references-count":69,"alternative-id":["10.1145\/3689031.3717471","10.1145\/3689031"],"URL":"https:\/\/doi.org\/10.1145\/3689031.3717471","relation":{},"subject":[],"published":{"date-parts":[[2025,3,30]]},"assertion":[{"value":"2025-03-30","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}