{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,13]],"date-time":"2026-06-13T00:14:27Z","timestamp":1781309667989,"version":"3.54.1"},"reference-count":12,"publisher":"Association for Computing Machinery (ACM)","issue":"6","license":[{"start":{"date-parts":[[2024,10,8]],"date-time":"2024-10-08T00:00:00Z","timestamp":1728345600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["U23A20361"],"award-info":[{"award-number":["U23A20361"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]},{"name":"Key Area R&D Program of Guangdong Province","award":["2022B0701180001"],"award-info":[{"award-number":["2022B0701180001"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Des. Autom. Electron. Syst."],"published-print":{"date-parts":[[2024,11,30]]},"abstract":"<jats:p>In VLSI design, the utilization of Design Rule Check (DRC) tools in the early stage is crucial for predicting and resolving violations, thereby expediting the physical design process. In our study, we present an efficient model that predicts DRC violations prior to the routing stage. Additionally, our model incorporates a sliding-window technique to enhance the feature extraction process. We extract structural features using Graph Convolutional Networks and utilize feature reuse techniques to fully recover the lost information in neural layers, which serves as input to the Convolutional Neural Network model, resulting in more accurate hotspot prediction. The experimental results demonstrate that our model successfully identifies 95.78% of DRC violations, with a mere 4.17% false-alarm rate. Not only does our method deliver improved feature preprocessing results, but it also enhances prediction accuracy compared to alternative approaches.<\/jats:p>","DOI":"10.1145\/3694968","type":"journal-article","created":{"date-parts":[[2024,9,5]],"date-time":"2024-09-05T16:09:31Z","timestamp":1725552571000},"page":"1-16","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":4,"title":["An Efficient Method of DRC Violation Prediction with a Serial Deep Learning Model"],"prefix":"10.1145","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0009-0004-2561-7231","authenticated-orcid":false,"given":"Jingui","family":"Lin","sequence":"first","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9456-9286","authenticated-orcid":false,"given":"Wenxiong","family":"Lin","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0000-7037-2713","authenticated-orcid":false,"given":"Shiyan","family":"Liang","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9954-1856","authenticated-orcid":false,"given":"Peng","family":"Gao","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7651-5287","authenticated-orcid":false,"given":"Yan","family":"Xing","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-2117-2412","authenticated-orcid":false,"given":"Tingting","family":"Wu","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2421-7621","authenticated-orcid":false,"given":"Xiaoming","family":"Xiong","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2842-6439","authenticated-orcid":false,"given":"Shuting","family":"Cai","sequence":"additional","affiliation":[{"name":"Guangdong University of Technology, Guangzhou, China"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2024,10,8]]},"reference":[{"key":"e_1_3_1_2_2","first-page":"157","volume-title":"Proceedings of the Symposium on International Symposium on Physical Design","author":"Bustany Ismail S.","year":"2015","unstructured":"Ismail S. Bustany, David Chinnery, Joseph R. Shinnerl, and Vladimir Yutsis. 2015. ISPD 2015 benchmarks with fence regions and routing blockages for detailed-routing-driven placement. In Proceedings of the Symposium on International Symposium on Physical Design. ACM, 157\u2013164."},{"key":"e_1_3_1_3_2","first-page":"1","volume-title":"Proceedings of the IEEE\/ACM International Conference On Computer Aided Design","author":"Chang Chen-Chia","year":"2021","unstructured":"Chen-Chia Chang, Jingyu Pan, Tunhou Zhang, Zhiyao Xie, Jiang Hu, Weiyi Qi, Chun-Wei Lin, Rongjian Liang, Joydeep Mitra, Elias Fallon, and Yiran Chen. 2021. Automatic routability predictor development using neural architecture search. In Proceedings of the IEEE\/ACM International Conference On Computer Aided Design. IEEE, 1\u20139."},{"key":"e_1_3_1_4_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2022.3168259"},{"key":"e_1_3_1_5_2","first-page":"1","volume-title":"Proceedings of the International Symposium on VLSI Design, Automation and Test","author":"Chen Li-Chin","year":"2018","unstructured":"Li-Chin Chen, Chien-Chia Huang, Yao-Lin Chang, and Hung-Ming Chen. 2018. A learning-based methodology for routability prediction in placement. In Proceedings of the International Symposium on VLSI Design, Automation and Test. IEEE, 1\u20134."},{"key":"e_1_3_1_6_2","first-page":"1","volume-title":"Proceedings of the IEEE 15th International Conference on Solid-State & Integrated Circuit Technology","author":"Chen Xuan","year":"2020","unstructured":"Xuan Chen, Zhi-Xiong Di, Wei Wu, Quan-Yuan Feng, and Jiang-Yi Shi. 2020. Detailed routing short violations prediction method using graph convolutional network. In Proceedings of the IEEE 15th International Conference on Solid-State & Integrated Circuit Technology. IEEE, 1\u20133."},{"key":"e_1_3_1_7_2","first-page":"57","volume-title":"Proceedings of the International Symposium on Physical Design","author":"Hung Wei-Tse","year":"2020","unstructured":"Wei-Tse Hung, Jun-Yang Huang, Yih-Chih Chou, Cheng-Hong Tsai, and Mango Chao. 2020. Transforming global routing report into DRC violation map with convolutional neural network. In Proceedings of the International Symposium on Physical Design. ACM, 57\u201364."},{"key":"e_1_3_1_8_2","unstructured":"Thomas N. Kipf and Max Welling. 2016. Semi-Supervised Classification with Graph Convolutional Networks. Retrieved from https:\/\/arXiv:1609.02907"},{"key":"e_1_3_1_9_2","doi-asserted-by":"publisher","DOI":"10.1162\/neco.1989.1.4.541"},{"key":"e_1_3_1_10_2","first-page":"1","volume-title":"Proceedings of the IEEE International Symposium on Circuits and Systems","author":"Li Lin","year":"2021","unstructured":"Lin Li, Yici Cai, and Qiang Zhou. 2021. An efficient approach for DRC hotspot prediction with convolutional neural network. In Proceedings of the IEEE International Symposium on Circuits and Systems. IEEE, 1\u20135."},{"key":"e_1_3_1_11_2","first-page":"1","volume-title":"Proceedings of the Design, Automation & Test in Europe Conference & Exhibition","author":"Spindler Peter","year":"2007","unstructured":"Peter Spindler and Frank M. Johannes. 2007. Fast and accurate routing demand estimation for efficient routability-driven placement. In Proceedings of the Design, Automation & Test in Europe Conference & Exhibition. IEEE, 1\u20136."},{"key":"e_1_3_1_12_2","doi-asserted-by":"publisher","DOI":"10.1145\/3195970.3195975"},{"key":"e_1_3_1_13_2","doi-asserted-by":"publisher","DOI":"10.1145\/3240765.3240843"}],"container-title":["ACM Transactions on Design Automation of Electronic Systems"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3694968","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3694968","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T01:18:07Z","timestamp":1750295887000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3694968"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2024,10,8]]},"references-count":12,"journal-issue":{"issue":"6","published-print":{"date-parts":[[2024,11,30]]}},"alternative-id":["10.1145\/3694968"],"URL":"https:\/\/doi.org\/10.1145\/3694968","relation":{},"ISSN":["1084-4309","1557-7309"],"issn-type":[{"value":"1084-4309","type":"print"},{"value":"1557-7309","type":"electronic"}],"subject":[],"published":{"date-parts":[[2024,10,8]]},"assertion":[{"value":"2024-04-15","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-08-30","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2024-10-08","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}