{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,11]],"date-time":"2026-03-11T16:57:01Z","timestamp":1773248221414,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":8,"publisher":"ACM","license":[{"start":{"date-parts":[[2025,3,16]],"date-time":"2025-03-16T00:00:00Z","timestamp":1742083200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,3,16]]},"DOI":"10.1145\/3698364.3709119","type":"proceedings-article","created":{"date-parts":[[2025,3,13]],"date-time":"2025-03-13T18:22:31Z","timestamp":1741890151000},"page":"20-21","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Invited: Physical Design Challenges for Design Technology Co-optimization"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2376-4970","authenticated-orcid":false,"given":"Taewhan","family":"Kim","sequence":"first","affiliation":[{"name":"Seoul National University, Seoul, Republic of Korea"}]}],"member":"320","published-online":{"date-parts":[[2025,3,16]]},"reference":[{"key":"e_1_3_2_1_1_1","volume-title":"Nov.","author":"TSMC","year":"2021","unstructured":"TSMC, ''Design Technology Co-Optimization for TSMC's N3 HPC Process,'' https:\/\/semiwiki.com\/semiconductor-manufacturers\/tsmc\/304509-design-technology-co-optimization-for-tsmcs-n3hpc-process\/, Nov. 2021."},{"key":"e_1_3_2_1_2_1","volume-title":"SPIE","author":"Keynote IMEC","year":"2019","unstructured":"IMEC Keynote, ''Standard-cell Design Architecture Options below 5nm Node: The Ultimate Scaling of FinFET and Nanosheet,'' Proc. SPIE, Mar. 2019."},{"key":"e_1_3_2_1_3_1","volume-title":"Aug.","author":"Jo K.","year":"2019","unstructured":"K. Jo, et al., ''Design rule evaluation framework using automatic cell layout generator for design technology co-optimization,'' TVLSI, Aug. 2019."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2020.3037885"},{"key":"e_1_3_2_1_5_1","volume-title":"Binding multi-bit flop-flop cells through design and technology co-optimization,'' DAC","author":"Jeong J.","year":"2024","unstructured":"J. Jeong, et al., ''Binding multi-bit flop-flop cells through design and technology co-optimization,'' DAC, 2024."},{"key":"e_1_3_2_1_6_1","volume-title":"Optimal layout synthesis of multi-row standard cells for advanced technology nodes,'' ICCAD","author":"Chung S.","year":"2024","unstructured":"S. Chung, et al., ''Optimal layout synthesis of multi-row standard cells for advanced technology nodes,'' ICCAD, 2024."},{"key":"e_1_3_2_1_7_1","volume-title":"Optimal transistor folding and placement for synthesizing standard cells of complementary FET technology,'' DAC","author":"Kim S.","year":"2024","unstructured":"S. Kim, et al., ''Optimal transistor folding and placement for synthesizing standard cells of complementary FET technology,'' DAC, 2024."},{"key":"e_1_3_2_1_8_1","volume-title":"Expanding design technology co-optimization potentials with back-side interconnect innovation,'' IEEE VLSI Technology and Circuits","author":"Kim B-S.","year":"2024","unstructured":"B-S. Kim, et al., ''Expanding design technology co-optimization potentials with back-side interconnect innovation,'' IEEE VLSI Technology and Circuits, 2024."}],"event":{"name":"ISPD '25: International Symposium on Physical Design","location":"Austin TX USA","acronym":"ISPD '25","sponsor":["SIGDA ACM Special Interest Group on Design Automation"]},"container-title":["Proceedings of the 2025 International Symposium on Physical Design"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3698364.3709119","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3698364.3709119","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,8,23]],"date-time":"2025-08-23T00:05:05Z","timestamp":1755907505000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3698364.3709119"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,3,16]]},"references-count":8,"alternative-id":["10.1145\/3698364.3709119","10.1145\/3698364"],"URL":"https:\/\/doi.org\/10.1145\/3698364.3709119","relation":{},"subject":[],"published":{"date-parts":[[2025,3,16]]},"assertion":[{"value":"2025-03-16","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}