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Syst."],"published-print":{"date-parts":[[2025,3,31]]},"abstract":"<jats:p>\n            In-memory processing offers a promising solution for enhancing the performance of data-intensive applications. While analog in-memory computing demonstrates remarkable efficiency, its limited precision is suitable only for approximate computing tasks. In contrast, digital in-memory computing delivers the deterministic precision necessary to accelerate high-assurance applications. Current digital in-memory computing methods typically involve manually breaking down arithmetic operations into in-memory compute kernels. In contrast, traditional digital circuits are synthesized through intricate and automated design workflows. In this article, we introduce a logic synthesis framework called LOGIC, which facilitates the translation of high-level applications into digital in-memory compute kernels that can be executed using non-volatile memory. We propose techniques for decomposing element-wise arithmetic operations into in-memory kernels while minimizing the number of in-memory operations. Additionally, we optimize the sequence of in-memory operations to reduce non-volatile memory utilization. To address the NP-hard execution sequencing optimization problem, we have developed two\n            <jats:italic>look-ahead<\/jats:italic>\n            algorithms that offer practical solutions. Additionally, we leverage data layout reorganization to efficiently accelerate applications that heavily rely on sparse matrix-vector multiplication operations. Our experimental evaluations demonstrate that our proposed synthesis approach improves the area and latency of fixed-point multiplication by 84% and 20% compared to the state-of-the-art, respectively. Moreover, when applied to scientific computing applications sourced from the SuiteSparse Matrix Collection, our design achieves remarkable improvements in area, latency, and energy efficiency by factors of 4.8\u00d7, 2.6\u00d7, and 11\u00d7, respectively.\n          <\/jats:p>","DOI":"10.1145\/3711848","type":"journal-article","created":{"date-parts":[[2025,1,8]],"date-time":"2025-01-08T10:32:12Z","timestamp":1736332332000},"page":"1-27","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["LOGIC: Logic Synthesis for Digital In-Memory Computing"],"prefix":"10.1145","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-0450-695X","authenticated-orcid":false,"given":"Muhammad Rashedul Haq","family":"Rashed","sequence":"first","affiliation":[{"name":"The University of Texas at Arlington, Arlington, United States"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sven","family":"Thijssen","sequence":"additional","affiliation":[{"name":"Florida Atlantic University, Boca Raton, United States"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Sumit","family":"Jha","sequence":"additional","affiliation":[{"name":"Florida International University, Miami, United States"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Rickard","family":"Ewetz","sequence":"additional","affiliation":[{"name":"University of Florida, Gainesville, United States"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2025,2,7]]},"reference":[{"key":"e_1_3_1_2_2","doi-asserted-by":"crossref","unstructured":"T. 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