{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T15:10:08Z","timestamp":1751037008044,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,6,30]]},"DOI":"10.1145\/3716368.3735188","type":"proceedings-article","created":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T14:00:26Z","timestamp":1751032826000},"page":"784-790","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Digital Predistortion for Quadrature Digital Power Amplifiers Using Deep Neural Network of AT_LSTM: Attention LSTM"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-9391-8653","authenticated-orcid":false,"given":"Jiayu","family":"Yang","sequence":"first","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-1732-6801","authenticated-orcid":false,"given":"Wending","family":"Zhao","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4447-7452","authenticated-orcid":false,"given":"Yicheng","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6976-5699","authenticated-orcid":false,"given":"Wang","family":"Wang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7896-4163","authenticated-orcid":false,"given":"Zixu","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7576-2742","authenticated-orcid":false,"given":"Manni","family":"Li","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-8166-0969","authenticated-orcid":false,"given":"Zijian","family":"Huang","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5939-3502","authenticated-orcid":false,"given":"Yinyin","family":"Lin","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3911-8079","authenticated-orcid":false,"given":"Yun","family":"Yin","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-1852-4112","authenticated-orcid":false,"given":"Hongtao","family":"Xu","sequence":"additional","affiliation":[{"name":"State Key Laboratory of Integrated Chips and Systems, Fudan University, Shanghai, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2025,6,29]]},"reference":[{"key":"e_1_3_3_1_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49661.2025.10904539"},{"key":"e_1_3_3_1_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC49657.2024.10454514"},{"key":"e_1_3_3_1_4_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42615.2023.10067825"},{"key":"e_1_3_3_1_5_2","doi-asserted-by":"crossref","unstructured":"Wen Yuan Vladimir Aparin Jeremy Dunworth Lee Seward and Jeffrey\u00a0S Walling. 2016. A quadrature switched capacitor power amplifier. IEEE Journal of Solid-State Circuits 51 5 (2016) 1200\u20131209.","DOI":"10.1109\/JSSC.2015.2496956"},{"key":"e_1_3_3_1_6_2","doi-asserted-by":"crossref","unstructured":"Ritesh Bhat and Harish Krishnaswamy. 2016. Design tradeoffs and predistortion of digital Cartesian RF-power-DAC transmitters. IEEE Transactions on Circuits and Systems II: Express Briefs 63 11 (2016) 1039\u20131043.","DOI":"10.1109\/TCSII.2016.2548279"},{"key":"e_1_3_3_1_7_2","doi-asserted-by":"crossref","unstructured":"Pan Xue Yilei Shen Dan Fang Chenyang Wang Haijun Shao Ting Yi Xiaoyang Zeng and Zhiliang Hong. 2018. A 2-D predistortion based on profile inversion for fully digital Cartesian transmitter. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 27 1 (2018) 47\u201356.","DOI":"10.1109\/TVLSI.2018.2867079"},{"key":"e_1_3_3_1_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/ASICON47005.2019.8983561"},{"key":"e_1_3_3_1_9_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS48785.2022.9937693"},{"key":"e_1_3_3_1_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/RFIT58767.2023.10243257"},{"key":"e_1_3_3_1_11_2","doi-asserted-by":"crossref","unstructured":"Dennis\u00a0R Morgan Zhengxiang Ma Jaehyeong Kim Michael\u00a0G Zierdt and John Pastalan. 2006. A generalized memory polynomial model for digital predistortion of RF power amplifiers. IEEE Transactions on signal processing 54 10 (2006) 3852\u20133860.","DOI":"10.1109\/TSP.2006.879264"},{"key":"e_1_3_3_1_12_2","doi-asserted-by":"publisher","DOI":"10.1109\/INMMIC.2018.8429984"},{"key":"e_1_3_3_1_13_2","doi-asserted-by":"crossref","unstructured":"Jinlong Sun Wenjuan Shi Zhutian Yang Jie Yang and Guan Gui. 2019. Behavioral modeling and linearization of wideband RF power amplifiers using BiLSTM networks for 5G wireless systems. IEEE Transactions on Vehicular Technology 68 11 (2019) 10348\u201310356.","DOI":"10.1109\/TVT.2019.2925562"},{"key":"e_1_3_3_1_14_2","doi-asserted-by":"crossref","unstructured":"Hongmin Li Yikang Zhang Gang Li and Falin Liu. 2020. Vector decomposed long short-term memory model for behavioral modeling and digital predistortion for wideband RF power amplifiers. IEEE Access 8 (2020) 63780\u201363789.","DOI":"10.1109\/ACCESS.2020.2984682"},{"key":"e_1_3_3_1_15_2","doi-asserted-by":"crossref","unstructured":"Ziming He and Fei Tong. 2022. Residual RNN models with pruning for digital predistortion of RF power amplifiers. IEEE Transactions on Vehicular Technology 71 9 (2022) 9735\u20139750.","DOI":"10.1109\/TVT.2022.3182233"},{"key":"e_1_3_3_1_16_2","doi-asserted-by":"crossref","unstructured":"Qianqian Zhang Chengye Jiang Guichen Yang Renlong Han and Falin Liu. 2023. Block-oriented recurrent neural network for digital predistortion of RF power amplifiers. IEEE Transactions on Microwave Theory and Techniques 72 7 (2023) 3875\u20133885.","DOI":"10.1109\/TMTT.2023.3337939"},{"key":"e_1_3_3_1_17_2","doi-asserted-by":"crossref","unstructured":"Qianqian Zhang Chengye Jiang Guichen Yang Renlong Han and Falin Liu. 2023. Multi-output recurrent neural network behavioral model for digital predistortion of RF power amplifiers. IEEE Microwave and Wireless Technology Letters 33 7 (2023) 1067\u20131070.","DOI":"10.1109\/LMWT.2023.3263642"},{"key":"e_1_3_3_1_18_2","doi-asserted-by":"crossref","unstructured":"Long Short-Term Memory. 2010. Long short-term memory. Neural computation 9 8 (2010) 1735\u20131780.","DOI":"10.1162\/neco.1997.9.8.1735"},{"key":"e_1_3_3_1_19_2","unstructured":"Volodymyr Mnih Nicolas Heess Alex Graves et\u00a0al. 2014. Recurrent models of visual attention. Advances in neural information processing systems 27 (2014)."},{"key":"e_1_3_3_1_20_2","unstructured":"Dzmitry Bahdanau. 2014. Neural machine translation by jointly learning to align and translate. arXiv preprint arXiv:https:\/\/arXiv.org\/abs\/1409.0473 (2014)."},{"key":"e_1_3_3_1_21_2","unstructured":"Chuhan Wu Fangzhao Wu Tao Qi Yongfeng Huang and Xing Xie. 2021. Fastformer: Additive attention can be all you need. arXiv preprint arXiv:https:\/\/arXiv.org\/abs\/2108.09084 (2021)."},{"key":"e_1_3_3_1_22_2","doi-asserted-by":"crossref","unstructured":"Yicheng Li Yun Yin Diyang Zheng Fu Gao Jie Lin Zhen Hu Ye Lu and Hongtao Xu. 2024. A quadrature digital power amplifier with wide efficiency enhancement coverage and high dynamic power range. IEEE Journal of Solid-State Circuits 59 7 (2024) 2133\u20132144.","DOI":"10.1109\/JSSC.2023.3347309"},{"key":"e_1_3_3_1_23_2","unstructured":"Diederik\u00a0P Kingma and Jimmy Ba. 2014. Adam: A method for stochastic optimization. arXiv preprint arXiv:https:\/\/arXiv.org\/abs\/1412.6980 (2014)."}],"event":{"name":"GLSVLSI '25: Great Lakes Symposium on VLSI 2025","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"New Orleans LA USA","acronym":"GLSVLSI '25"},"container-title":["Proceedings of the Great Lakes Symposium on VLSI 2025"],"original-title":[],"deposited":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T14:37:34Z","timestamp":1751035054000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3716368.3735188"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,6,29]]},"references-count":22,"alternative-id":["10.1145\/3716368.3735188","10.1145\/3716368"],"URL":"https:\/\/doi.org\/10.1145\/3716368.3735188","relation":{},"subject":[],"published":{"date-parts":[[2025,6,29]]},"assertion":[{"value":"2025-06-29","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}