{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T15:10:07Z","timestamp":1751037007509,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":22,"publisher":"ACM","funder":[{"DOI":"10.13039\/501100005089","name":"Beijing Municipal Natural Science Foundation","doi-asserted-by":"publisher","award":["4252024"],"award-info":[{"award-number":["4252024"]}],"id":[{"id":"10.13039\/501100005089","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Foundation of Laboratory for Advanced Computing and Intelligence Engineering","award":["2023-LYJJ-01-013"],"award-info":[{"award-number":["2023-LYJJ-01-013"]}]},{"name":"Basic Research Projects from the Institute of Software, Chinese Academy of Sciences","award":["ISCAS-JCZD-202307"],"award-info":[{"award-number":["ISCAS-JCZD-202307"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["62372438"],"award-info":[{"award-number":["62372438"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,6,30]]},"DOI":"10.1145\/3716368.3735197","type":"proceedings-article","created":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T14:00:26Z","timestamp":1751032826000},"page":"29-34","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Fast, Transparent and Accurate Simulation of Thousand Processing-in-Memory Cores"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0003-6037-0804","authenticated-orcid":false,"given":"Zhichao","family":"Lv","sequence":"first","affiliation":[{"name":"University of Chinese Academy of Sciences, Institute of Software, Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-7016-4266","authenticated-orcid":false,"given":"Tianjun","family":"Bu","sequence":"additional","affiliation":[{"name":"University of Chinese Academy of Sciences, Institute of Software, Chinese Academy of Sciences, Beijing, China"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8099-2035","authenticated-orcid":false,"given":"Qiusong","family":"Yang","sequence":"additional","affiliation":[{"name":"Institute of Software, Chinese Academy of Sciences, Beijing, China and Advanced Computing and Intelligence Engineering, Wuxi, Jiangsu, China"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2025,6,29]]},"reference":[{"key":"e_1_3_3_1_2_2","doi-asserted-by":"crossref","unstructured":"Junwhan Ahn Sungjoo Yoo Onur Mutlu and Kiyoung Choi. 2015. PIM-enabled instructions: A low-overhead locality-aware processing-in-memory architecture. 2015 ACM\/IEEE 42nd Annual International Symposium on Computer Architecture (ISCA) (2015) 336\u2013348. https:\/\/api.semanticscholar.org\/CorpusID:980581","DOI":"10.1145\/2749469.2750385"},{"key":"e_1_3_3_1_3_2","doi-asserted-by":"publisher","unstructured":"Alexander Baumstark Muhammad\u00a0Attahir Jibril and Kai-Uwe Sattler. 2023. Accelerating Large Table Scan Using Processing-In-Memory Technology. (2023). 10.18420\/BTW2023-51","DOI":"10.18420\/BTW2023-51"},{"key":"e_1_3_3_1_4_2","doi-asserted-by":"publisher","unstructured":"Amirali Boroumand Saugata Ghose Youngsok Kim Rachata Ausavarungnirun Eric Shiu Rahul Thakur Daehyun Kim Aki Kuusela Allan Knies Parthasarathy Ranganathan and Onur Mutlu. 2018. Google Workloads for Consumer Devices: Mitigating Data Movement Bottlenecks. SIGPLAN Not. 53 2 (Nov. 2018) 316\u2013331. 10.1145\/3296957.3173177","DOI":"10.1145\/3296957.3173177"},{"key":"e_1_3_3_1_5_2","unstructured":"Niladrish Chatterjee Rajeev Balasubramonian Manjunath Shevgoor Seth\u00a0H Pugsley Aniruddha\u00a0N Udipi Ali Shafiee Kshitij Sudan Manu Awasthi and Zeshan Chishti. [n. d.]. USIMM: The Utah SImulated Memory Module. ([n. d.])."},{"key":"e_1_3_3_1_6_2","doi-asserted-by":"publisher","DOI":"10.1109\/DSD53832.2021.00048"},{"key":"e_1_3_3_1_7_2","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2019.00093"},{"key":"e_1_3_3_1_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/HOTCHIPS.2019.8875680"},{"key":"e_1_3_3_1_9_2","doi-asserted-by":"crossref","unstructured":"Fabrice Devaux. 2019. The true Processing In Memory accelerator. 2019 IEEE Hot Chips 31 Symposium (HCS) (2019) 1\u201324. https:\/\/api.semanticscholar.org\/CorpusID:204821906","DOI":"10.1109\/HOTCHIPS.2019.8875680"},{"key":"e_1_3_3_1_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/IGSC54211.2021.9651614"},{"key":"e_1_3_3_1_11_2","doi-asserted-by":"publisher","unstructured":"Juan Gomez-Luna Izzat\u00a0El Hajj Ivan Fernandez Christina Giannoula Geraldo\u00a0F. Oliveira and Onur Mutlu. [n. d.]. Benchmarking a New Paradigm: Experimental Analysis and Characterization of a Real Processing-in-Memory System. 10 ([n. d.]) 52565\u201352608. 10.1109\/ACCESS.2022.3174101","DOI":"10.1109\/ACCESS.2022.3174101"},{"key":"e_1_3_3_1_12_2","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC59245.2023.00018"},{"key":"e_1_3_3_1_13_2","unstructured":"Bongjoon Hyun. 2024. uPIMulator. (2024). https:\/\/github.com\/VIA-Research\/uPIMulator"},{"key":"e_1_3_3_1_14_2","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA57654.2024.00029"},{"key":"e_1_3_3_1_15_2","doi-asserted-by":"publisher","unstructured":"Yoongu Kim Weikun Yang and Onur Mutlu. 2016. Ramulator: A Fast and Extensible DRAM Simulator. IEEE Computer Architecture Letters 15 1 (Jan. 2016) 45\u201349. 10.1109\/LCA.2015.2414456","DOI":"10.1109\/LCA.2015.2414456"},{"key":"e_1_3_3_1_16_2","doi-asserted-by":"publisher","unstructured":"Donghun Lee Andrew Chang Minseon Ahn Jongmin Gim Jungmin Kim Jaemin Jung Kangwoo Choi Vincent Pham Oliver Rebholz Krishna Malladi and Yang-Seok Ki. 2020. Optimizing Data Movement with Near-Memory Acceleration of In-memory DBMS. 10.5441\/002\/EDBT.2020.35","DOI":"10.5441\/002\/EDBT.2020.35"},{"key":"e_1_3_3_1_17_2","doi-asserted-by":"crossref","unstructured":"Scott Rixner William\u00a0J. Dally Ujval\u00a0J. Kapasi Peter\u00a0R. Mattson and John\u00a0Douglas Owens. 2000. Memory access scheduling. Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No. RS00201) (2000) 128\u2013138. https:\/\/api.semanticscholar.org\/CorpusID:704678","DOI":"10.1145\/339647.339668"},{"key":"e_1_3_3_1_18_2","doi-asserted-by":"publisher","unstructured":"P Rosenfeld E Cooper-Balis and B Jacob. 2011. DRAMSim2: A Cycle Accurate Memory System Simulator. IEEE Comput. Arch. Lett. 10 1 (Jan. 2011) 16\u201319. 10.1109\/L-CA.2011.4","DOI":"10.1109\/L-CA.2011.4"},{"key":"e_1_3_3_1_19_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS48437.2020.00016"},{"key":"e_1_3_3_1_20_2","doi-asserted-by":"publisher","DOI":"10.1145\/3316781.3317867"},{"key":"e_1_3_3_1_21_2","unstructured":"UPMEM. 2018. Introduction to UPMEM PIM. Processing-in-memory (PIM) on DRAM Accelerator (White Paper). (2018)."},{"key":"e_1_3_3_1_22_2","doi-asserted-by":"publisher","unstructured":"Sam\u00a0(Likun) Xi Yuan Yao Kshitij Bhardwaj Paul Whatmough Gu-Yeon Wei and David Brooks. 2020. SMAUG: End-to-End Full-Stack Simulation Infrastructure for Deep Learning Workloads. ACM Trans. Archit. Code Optim. 17 4 (Dec. 2020) 1\u201326. 10.1145\/3424669","DOI":"10.1145\/3424669"},{"key":"e_1_3_3_1_23_2","doi-asserted-by":"publisher","unstructured":"Sheng Xu Xiaoming Chen Ying Wang Yinhe Han Xuehai Qian and Xiaowei Li. 2019. PIMSim: A Flexible and Detailed Processing-in-Memory Simulator. IEEE Comput. Arch. Lett. 18 1 (Jan. 2019) 6\u20139. 10.1109\/LCA.2018.2885752","DOI":"10.1109\/LCA.2018.2885752"}],"event":{"name":"GLSVLSI '25: Great Lakes Symposium on VLSI 2025","sponsor":["SIGDA ACM Special Interest Group on Design Automation"],"location":"New Orleans LA USA","acronym":"GLSVLSI '25"},"container-title":["Proceedings of the Great Lakes Symposium on VLSI 2025"],"original-title":[],"deposited":{"date-parts":[[2025,6,27]],"date-time":"2025-06-27T14:36:38Z","timestamp":1751034998000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3716368.3735197"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,6,29]]},"references-count":22,"alternative-id":["10.1145\/3716368.3735197","10.1145\/3716368"],"URL":"https:\/\/doi.org\/10.1145\/3716368.3735197","relation":{},"subject":[],"published":{"date-parts":[[2025,6,29]]},"assertion":[{"value":"2025-06-29","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}