{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,8,2]],"date-time":"2025-08-02T16:26:29Z","timestamp":1754151989205,"version":"3.41.2"},"publisher-location":"New York, NY, USA","reference-count":37,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,5,28]]},"DOI":"10.1145\/3719276.3725199","type":"proceedings-article","created":{"date-parts":[[2025,7,4]],"date-time":"2025-07-04T05:00:46Z","timestamp":1751605246000},"page":"185-194","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Multi-GPU Greedy Scheduling Through a Polyglot Runtime"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0009-1572-3221","authenticated-orcid":false,"given":"Ian","family":"Di Dio Lavore","sequence":"first","affiliation":[{"name":"Politecnico di Milano, Milano, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2026-9755","authenticated-orcid":false,"given":"Guido Walter","family":"Di Donato","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, Milano, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8806-1665","authenticated-orcid":false,"given":"Alberto","family":"Parravicini","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, Milano, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8319-7491","authenticated-orcid":false,"given":"Francesco","family":"Sgherzi","sequence":"additional","affiliation":[{"name":"Barcelona Supercomputing Center, Barcelona, Spain"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7633-4224","authenticated-orcid":false,"given":"Daniele","family":"Bonetta","sequence":"additional","affiliation":[{"name":"VU Amsterdam, Amsterdam, Netherlands"}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-9883-9693","authenticated-orcid":false,"given":"Marco Domenico","family":"Santambrogio","sequence":"additional","affiliation":[{"name":"Politecnico di Milano, Milano, Italy"}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2025,7,4]]},"reference":[{"key":"e_1_3_3_3_2_2","first-page":"265","volume-title":"12th USENIX Symposium on Operating Systems Design and Implementation (OSDI 16)","author":"Abadi Martin","year":"2016","unstructured":"Martin Abadi, Paul Barham, Jianmin Chen, Zhifeng Chen, Andy Davis, Jeffrey Dean, Matthieu Devin, Sanjay Ghemawat, Geoffrey Irving, Michael Isard, Manjunath Kudlur, Josh Levenberg, Rajat Monga, Sherry Moore, Derek\u00a0G. Murray, Benoit Steiner, Paul Tucker, Vijay Vasudevan, Pete Warden, Martin Wicke, Yuan Yu, and Xiaoqiang Zheng. 2016. TensorFlow: A system for large-scale machine learning. In 12th USENIX Symposium on Operating Systems Design and Implementation (OSDI 16). 265\u2013283. https:\/\/www.usenix.org\/system\/files\/conference\/osdi16\/osdi16-abadi.pdf"},{"key":"e_1_3_3_3_3_2","first-page":"178","volume-title":"Proceedings of Machine Learning and Systems","volume":"1","author":"Agrawal Akshay","year":"2019","unstructured":"Akshay Agrawal, Akshay Modi, Alexandre Passos, Allen Lavoie, Ashish Agarwal, Asim Shankar, Igor Ganichev, Josh Levenberg, Mingsheng Hong, Rajat Monga, and Shanqing Cai. 2019. TensorFlow Eager: A multi-stage, Python-embedded DSL for machine learning. In Proceedings of Machine Learning and Systems , A.\u00a0Talwalkar, V.\u00a0Smith, and M.\u00a0Zaharia (Eds.), Vol.\u00a01. 178\u2013189. https:\/\/proceedings.mlsys.org\/paper_files\/paper\/2019\/file\/b3cd73d353d39e5cf6f6e9ff8d14c87f-Paper.pdf"},{"key":"e_1_3_3_3_4_2","doi-asserted-by":"publisher","DOI":"10.1145\/3458817.3480855"},{"key":"e_1_3_3_3_5_2","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126933"},{"key":"e_1_3_3_3_6_2","volume-title":"PCI express system architecture","author":"Budruk Ravi","year":"2004","unstructured":"Ravi Budruk, Don Anderson, and Tom Shanley. 2004. PCI express system architecture. Addison-Wesley Professional."},{"key":"e_1_3_3_3_7_2","unstructured":"Barcellona\u00a0Supercomputing Center. 2025. OmpSs-2 Programming model. https:\/\/pm.bsc.es\/ompss-2. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/MCHPC49590.2019.00014"},{"key":"e_1_3_3_3_9_2","doi-asserted-by":"crossref","unstructured":"James Clarkson Juan Fumero Michail Papadimitriou Foivos\u00a0S. Zakkak Maria Xekalaki Christos Kotselidis and Mikel Luj\u00e1n. 2018. Exploiting high-performance heterogeneous hardware for Java programs using graal(ManLang \u201918). Association for Computing Machinery New York NY USA Article 4 13\u00a0pages. doi:10.1145\/3237009.3237016","DOI":"10.1145\/3237009.3237016"},{"key":"e_1_3_3_3_10_2","volume-title":"Proceedings of the Asia-Pacific Programming Languages and Compilers Workshop","author":"Duboscq Gilles","year":"2013","unstructured":"Gilles Duboscq, Lukas Stadler, Thomas W\u00fcrthinger, Doug Simon, Christian Wimmer, and Hanspeter M\u00f6ssenb\u00f6ck. 2013. Graal IR: An extensible declarative intermediate representation. In Proceedings of the Asia-Pacific Programming Languages and Compilers Workshop."},{"key":"e_1_3_3_3_11_2","doi-asserted-by":"crossref","unstructured":"Alejandro Duran Eduard Ayguad\u00e9 Rosa\u00a0M Badia Jes\u00fas Labarta Luis Martinell Xavier Martorell and Judit Planas. 2011. Ompss: a proposal for programming heterogeneous multi-core architectures. Parallel processing letters 21 02 (2011) 173\u2013193.","DOI":"10.1142\/S0129626411000151"},{"key":"e_1_3_3_3_12_2","doi-asserted-by":"publisher","DOI":"10.1145\/3313808.3313819"},{"key":"e_1_3_3_3_13_2","volume-title":"6th Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG)","author":"Gautier Thierry","year":"2013","unstructured":"Thierry Gautier, Joao\u00a0Vicente Ferreira\u00a0Lima, Nicolas Maillard, and Bruno Raffin. 2013. Locality-Aware Work Stealing on Multi-CPU and Multi-GPU Architectures. In 6th Workshop on Programmability Issues for Heterogeneous Multicores (MULTIPROG). Berlin, Germany. https:\/\/inria.hal.science\/hal-00780890"},{"key":"e_1_3_3_3_14_2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-58144-2_19"},{"key":"e_1_3_3_3_15_2","doi-asserted-by":"publisher","DOI":"10.1016\/B978-0-12-385963-1.00027-7"},{"key":"e_1_3_3_3_16_2","doi-asserted-by":"crossref","unstructured":"Ang Li Shuaiwen\u00a0Leon Song Jieyang Chen Jiajia Li Xu Liu Nathan\u00a0R. Tallent and Kevin\u00a0J. Barker. 2020. Evaluating Modern GPU Interconnect: PCIe NVLink NV-SLI NVSwitch and GPUDirect. IEEE Transactions on Parallel and Distributed Systems 31 1 (2020) 94\u2013110. doi:10.1109\/TPDS.2019.2928289","DOI":"10.1109\/TPDS.2019.2928289"},{"key":"e_1_3_3_3_17_2","doi-asserted-by":"publisher","DOI":"10.1109\/CCGrid.2015.105"},{"key":"e_1_3_3_3_18_2","volume-title":"GPU Techonology Conference","author":"Luitjens Justin","year":"2015","unstructured":"Justin Luitjens. 2015. Cuda streams: Best practices and common pitfalls. In GPU Techonology Conference."},{"key":"e_1_3_3_3_19_2","unstructured":"Rene Mueller and Lukas Stadler. 2025. grCUDA: Polyglot GPU Access in GraalVM. https:\/\/github.com\/NVIDIA\/grcuda. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_20_2","doi-asserted-by":"crossref","unstructured":"John Nickolls Ian Buck Michael Garland and Kevin Skadron. 2008. Scalable Parallel Programming with CUDA: Is CUDA the parallel programming model that application developers have been waiting for? Queue 6 2 (March 2008) 40\u201353. doi:10.1145\/1365490.1365500","DOI":"10.1145\/1365490.1365500"},{"key":"e_1_3_3_3_21_2","unstructured":"NVIDIA. 2025. cuBLAS. https:\/\/docs.nvidia.com\/cuda\/cublas\/index.html. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_22_2","unstructured":"NVIDIA. 2025. CUDA Graphs. https:\/\/docs.nvidia.com\/cuda\/cuda-runtime-api\/group__CUDART__GRAPH.html. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_23_2","unstructured":"NVIDIA. 2025. CUDA Toolkit Documentation - Event Management. https:\/\/docs.nvidia.com\/cuda\/cuda-runtime-api\/group__CUDART__EVENT.html. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_24_2","unstructured":"NVIDIA. 2025. cuSPARSE. https:\/\/docs.nvidia.com\/cuda\/cusparse\/index.html. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_25_2","unstructured":"NVIDIA. 2025. NVIDIA H100 Tensor Core GPU. https:\/\/www.nvidia.com\/en-us\/data-center\/h100\/. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_26_2","unstructured":"NVIDIA. 2025. NVIDIA NVLINK - High-Speed GPU Interconnect. https:\/\/www.nvidia.com\/en-us\/design-visualization\/nvlink-bridges. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_27_2","unstructured":"NVIDIA. 2025. NVSwitch: Leveraging NVLink to Maximum Effect. https:\/\/developer.nvidia.com\/blog\/nvswitch-leveraging-nvlink-to-maximum-effect. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_28_2","unstructured":"NVIDIA. 2025. A Polyglot Language Binding for CUDA in GraalVM. https:\/\/developer.nvidia.com\/blog\/grcuda-a-polyglot-language-binding-for-cuda-in-graalvm. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_29_2","unstructured":"Oracle. 2025. GraalVM. https:\/\/www.graalvm.org. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_30_2","unstructured":"Oracle. 2025. Oracle Cloud Infrastructure - NVIDIA. https:\/\/www.oracle.com\/cloud\/compute\/gpu\/. [Accessed 2025-03-16]."},{"key":"e_1_3_3_3_31_2","doi-asserted-by":"publisher","DOI":"10.1145\/3453933.3454019"},{"key":"e_1_3_3_3_32_2","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS49936.2021.00020"},{"key":"e_1_3_3_3_33_2","first-page":"8024","volume-title":"Advances in Neural Information Processing Systems 32","author":"Paszke Adam","year":"2019","unstructured":"Adam Paszke, Sam Gross, Francisco Massa, Adam Lerer, James Bradbury, Gregory Chanan, Trevor Killeen, Zeming Lin, Natalia Gimelshein, Luca Antiga, Alban Desmaison, Andreas Kopf, Edward Yang, Zachary DeVito, Martin Raison, Alykhan Tejani, Sasank Chilamkurthy, Benoit Steiner, Lu Fang, Junjie Bai, and Soumith Chintala. 2019. PyTorch: An Imperative Style, High-Performance Deep Learning Library. In Advances in Neural Information Processing Systems 32, H.\u00a0Wallach, H.\u00a0Larochelle, A.\u00a0Beygelzimer, F.\u00a0d'Alch\u00e9-Buc, E.\u00a0Fox, and R.\u00a0Garnett (Eds.). Curran Associates, Inc., 8024\u20138035. http:\/\/papers.neurips.cc\/paper\/9015-pytorch-an-imperative-style-high-performance-deep-learning-library.pdf"},{"key":"e_1_3_3_3_34_2","doi-asserted-by":"publisher","DOI":"10.1145\/3458817.3480853"},{"key":"e_1_3_3_3_35_2","unstructured":"Nikolay Sakharnykh. 2025. Everything you need to know about unified memory. https:\/\/on-demand.gputechconf.com\/gtc\/2018\/presentation\/s8430-everything-you-need-to-know-about-unified-memory.pdf. [Accessed 2024-03-21]."},{"key":"e_1_3_3_3_36_2","doi-asserted-by":"publisher","DOI":"10.1145\/2384716.2384723"},{"key":"e_1_3_3_3_37_2","doi-asserted-by":"publisher","DOI":"10.1145\/2509578.2509581"},{"key":"e_1_3_3_3_38_2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-03869-3_82"}],"event":{"name":"CF '25: 22nd ACM International Conference on Computing Frontiers","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"],"location":"Cagliari Italy","acronym":"CF '25"},"container-title":["Proceedings of the 22nd ACM International Conference on Computing Frontiers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3719276.3725199","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,21]],"date-time":"2025-07-21T09:48:20Z","timestamp":1753091300000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3719276.3725199"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,5,28]]},"references-count":37,"alternative-id":["10.1145\/3719276.3725199","10.1145\/3719276"],"URL":"https:\/\/doi.org\/10.1145\/3719276.3725199","relation":{},"subject":[],"published":{"date-parts":[[2025,5,28]]},"assertion":[{"value":"2025-07-04","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}