{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,15]],"date-time":"2026-04-15T23:27:51Z","timestamp":1776295671490,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","funder":[{"name":"CN HPC","award":["CUP J33C22001170001"],"award-info":[{"award-number":["CUP J33C22001170001"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,5,28]]},"DOI":"10.1145\/3719276.3725203","type":"proceedings-article","created":{"date-parts":[[2025,7,4]],"date-time":"2025-07-04T05:00:46Z","timestamp":1751605246000},"page":"84-87","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["FractalSync: Lightweight Scalable Global Synchronization of Massive Bulk Synchronous Parallel AI Accelerators"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0007-0927-9086","authenticated-orcid":false,"given":"Victor","family":"Isachi","sequence":"first","affiliation":[{"name":"University of Bologna, Bologna, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-3574-7576","authenticated-orcid":false,"given":"Alessandro","family":"Nadalini","sequence":"additional","affiliation":[{"name":"University of Bologna, Bologna, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-7416-1749","authenticated-orcid":false,"given":"Riccardo Fiorani","family":"Gallotta","sequence":"additional","affiliation":[{"name":"University of Bologna, Bologna, Italy and University of Pavia, Pavia, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7495-6895","authenticated-orcid":false,"given":"Angelo","family":"Garofalo","sequence":"additional","affiliation":[{"name":"University of Bologna, Bologna, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7924-933X","authenticated-orcid":false,"given":"Francesco","family":"Conti","sequence":"additional","affiliation":[{"name":"University of Bologna, Bologna, Italy"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0651-5393","authenticated-orcid":false,"given":"Davide","family":"Rossi","sequence":"additional","affiliation":[{"name":"University of Bologna, Bologna, Italy"}]}],"member":"320","published-online":{"date-parts":[[2025,7,4]]},"reference":[{"key":"e_1_3_3_2_2_2","doi-asserted-by":"crossref","unstructured":"Thomas Benz Michael Rogenmoser Paul Scheffler Samuel Riedel Alessandro Ottaviano Andreas Kurth Torsten Hoefler and Luca Benini. 2023. A high-performance energy-efficient modular DMA engine architecture. IEEE Trans. Comput. (2023).","DOI":"10.1109\/TC.2023.3329930"},{"key":"e_1_3_3_2_3_2","doi-asserted-by":"crossref","unstructured":"Thomas Cheatham Amr Fahmy Dan Stefanescu and Leslie Valiant. 1996. Bulk synchronous parallel computing\u2014a paradigm for transportable software. Tools and Environments for Parallel and Distributed Systems (1996) 61\u201376.","DOI":"10.1007\/978-1-4615-4123-3_4"},{"key":"e_1_3_3_2_4_2","doi-asserted-by":"crossref","unstructured":"Tim Fischer Michael Rogenmoser Thomas Benz Frank\u00a0K G\u00fcrkaynak and Luca Benini. 2025. FlooNoC: A 645-Gb\/s\/link 0.15-pJ\/B\/hop Open-Source NoC With Wide Physical Links and End-to-End AXI4 Parallel Multistream Support. IEEE Transactions on Very Large Scale Integration (VLSI) Systems (2025).","DOI":"10.1109\/TVLSI.2025.3527225"},{"key":"e_1_3_3_2_5_2","doi-asserted-by":"crossref","unstructured":"Michael Gautschi Pasquale\u00a0Davide Schiavone Andreas Traber Igor Loi Antonio Pullini Davide Rossi Eric Flamand Frank\u00a0K G\u00fcrkaynak and Luca Benini. 2017. Near-threshold RISC-V core with DSP extensions for scalable IoT endpoint devices. IEEE transactions on very large scale integration (VLSI) systems 25 10 (2017) 2700\u20132713.","DOI":"10.1109\/TVLSI.2017.2654506"},{"key":"e_1_3_3_2_6_2","doi-asserted-by":"crossref","unstructured":"Alexandros\u00a0V Gerbessiotis and Leslie\u00a0G Valiant. 1994. Direct bulk-synchronous parallel algorithms. Journal of parallel and distributed computing 22 2 (1994) 251\u2013267.","DOI":"10.1006\/jpdc.1994.1085"},{"key":"e_1_3_3_2_7_2","doi-asserted-by":"publisher","DOI":"10.1017\/9781009070218.003"},{"key":"e_1_3_3_2_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/SFCS.1980.13"},{"key":"e_1_3_3_2_9_2","doi-asserted-by":"crossref","unstructured":"Yvan Tortorella Luca Bertaccini Luca Benini Davide Rossi and Francesco Conti. 2023. RedMule: A mixed-precision matrix\u2013matrix operation engine for flexible and energy-efficient on-chip linear algebra and TinyML training acceleration. Future Generation Computer Systems 149 (2023) 122\u2013135.","DOI":"10.1016\/j.future.2023.07.002"},{"key":"e_1_3_3_2_10_2","doi-asserted-by":"crossref","unstructured":"Leslie\u00a0G Valiant. 1990. A bridging model for parallel computation. Commun. ACM 33 8 (1990) 103\u2013111.","DOI":"10.1145\/79173.79181"}],"event":{"name":"CF '25: 22nd ACM International Conference on Computing Frontiers","location":"Cagliari Italy","acronym":"CF '25","sponsor":["SIGMICRO ACM Special Interest Group on Microarchitectural Research and Processing"]},"container-title":["Proceedings of the 22nd ACM International Conference on Computing Frontiers"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3719276.3725203","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,7,21]],"date-time":"2025-07-21T09:49:21Z","timestamp":1753091361000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3719276.3725203"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,5,28]]},"references-count":9,"alternative-id":["10.1145\/3719276.3725203","10.1145\/3719276"],"URL":"https:\/\/doi.org\/10.1145\/3719276.3725203","relation":{},"subject":[],"published":{"date-parts":[[2025,5,28]]},"assertion":[{"value":"2025-07-04","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}