{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,23]],"date-time":"2026-04-23T08:00:15Z","timestamp":1776931215046,"version":"3.51.2"},"publisher-location":"New York, NY, USA","reference-count":9,"publisher":"ACM","license":[{"start":{"date-parts":[[2025,11,15]],"date-time":"2025-11-15T00:00:00Z","timestamp":1763164800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/100000001","name":"NSF (National Science Foundation)","doi-asserted-by":"publisher","award":["2047521, 1955650"],"award-info":[{"award-number":["2047521, 1955650"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2025,11,16]]},"DOI":"10.1145\/3731599.3767487","type":"proceedings-article","created":{"date-parts":[[2025,11,7]],"date-time":"2025-11-07T16:20:02Z","timestamp":1762532402000},"page":"1110-1116","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["The MALL is Open: Exploring Shared Caches and Latency in AMD CDNA\u2122 3 GPUs"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0001-1077-5649","authenticated-orcid":false,"given":"Andrew","family":"Tee","sequence":"first","affiliation":[{"name":"University of California, Riverside, Riverside, California, USA and Advanced Micro Devices, Inc. (AMD), Austin, Texas, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0303-4711","authenticated-orcid":false,"given":"Nicholas","family":"Curtis","sequence":"additional","affiliation":[{"name":"Advanced Micro Devices, Inc. (AMD), Austin, Texas, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7935-421X","authenticated-orcid":false,"given":"Noah","family":"Wolfe","sequence":"additional","affiliation":[{"name":"Advanced Micro Devices, Inc. (AMD), Austin, Texas, USA"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-5376-7868","authenticated-orcid":false,"given":"Daniel","family":"Wong","sequence":"additional","affiliation":[{"name":"University of California, Riverside, Riverside, California, USA"}]}],"member":"320","published-online":{"date-parts":[[2025,11,15]]},"reference":[{"key":"e_1_3_3_1_2_2","doi-asserted-by":"crossref","unstructured":"Hamdy Abdelkhalik Yehia Arafa Nandakishore Santhi and Abdel-Hameed Badawy. 2022. Demystifying the Nvidia Ampere Architecture through Microbenchmarking and Instruction-level Analysis. arXiv preprint arXiv:https:\/\/arXiv.org\/abs\/2208.11174 (2022). https:\/\/arxiv.org\/abs\/2208.11174","DOI":"10.1109\/HPEC55821.2022.9926299"},{"key":"e_1_3_3_1_3_2","unstructured":"AMD. 2022. AMD CDNA 2 Architecture White Paper. https:\/\/www.amd.com\/content\/dam\/amd\/en\/documents\/instinct-business-docs\/white-papers\/amd-cdna2-white-paper.pdf. Accessed: 2025-07-20."},{"key":"e_1_3_3_1_4_2","unstructured":"AMD. 2022. AMD Instinct MI200 Instruction Set Architecture. https:\/\/www.amd.com\/content\/dam\/amd\/en\/documents\/instinct-tech-docs\/instruction-set-architectures\/instinct-mi200-cdna2-instruction-set-architecture.pdf. Accessed: 2025-07-20."},{"key":"e_1_3_3_1_5_2","unstructured":"AMD. 2024. AMD CDNA 3 Architecture White Paper. https:\/\/www.amd.com\/content\/dam\/amd\/en\/documents\/instinct-tech-docs\/white-papers\/amd-cdna-3-white-paper.pdf. Accessed: 2025-07-20."},{"key":"e_1_3_3_1_6_2","unstructured":"AMD. 2025. AMD Instinct MI300 Instruction Set Architecture. https:\/\/www.amd.com\/content\/dam\/amd\/en\/documents\/instinct-tech-docs\/instruction-set-architectures\/amd-instinct-mi300-cdna3-instruction-set-architecture.pdf. Accessed: 2025-07-20."},{"key":"e_1_3_3_1_7_2","unstructured":"Weile Luo Ruibo Fan Zeyu Li Dayou Du Hongyuan Liu Qiang Wang and Xiaowen Chu. 2025. Dissecting the NVIDIA Hopper Architecture through Microbenchmarking and Multiple Level Analysis. arXiv preprint arXiv:https:\/\/arXiv.org\/abs\/2501.12084 (2025). https:\/\/arxiv.org\/abs\/2501.12084"},{"key":"e_1_3_3_1_8_2","unstructured":"Xinxin Mei and Xiaowen Chu. 2015. Dissecting GPU Memory Hierarchy through Microbenchmarking. arXiv preprint arXiv:https:\/\/arXiv.org\/abs\/1509.02308 (2015). https:\/\/arxiv.org\/abs\/1509.02308"},{"key":"e_1_3_3_1_9_2","unstructured":"Muhammad Osama Ryan Swann Karthik Sangaiah Sonali Singh Ganesh Dasika Rajneesh Bhardwaj and AMD. 2025. Deep dive into the MI300 compute and memory partition modes. https:\/\/rocm.blogs.amd.com\/software-tools-optimization\/compute-memory-modes\/README.html. Accessed: 2025-07-20."},{"key":"e_1_3_3_1_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2010.5452013"}],"event":{"name":"SC Workshops '25: Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis","location":"St Louis MO USA","acronym":"SC Workshops '25","sponsor":["SIGHPC ACM Special Interest Group on High Performance Computing, Special Interest Group on High Performance Computing"]},"container-title":["Proceedings of the SC '25 Workshops of the International Conference for High Performance Computing, Networking, Storage and Analysis"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/abs\/10.1145\/3731599.3767487","content-type":"text\/html","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3731599.3767487","content-type":"application\/pdf","content-version":"vor","intended-application":"syndication"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3731599.3767487","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,1,9]],"date-time":"2026-01-09T19:36:55Z","timestamp":1767987415000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3731599.3767487"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2025,11,15]]},"references-count":9,"alternative-id":["10.1145\/3731599.3767487","10.1145\/3731599"],"URL":"https:\/\/doi.org\/10.1145\/3731599.3767487","relation":{},"subject":[],"published":{"date-parts":[[2025,11,15]]},"assertion":[{"value":"2025-11-15","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}