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In response to these challenges, this article pioneers the integration of large language model (LLM) into the HLS optimization workflow, leveraging their capabilities as both sophisticated feature extractors and autonomous agents. This application of LLM marks a significant departure from traditional methods, introducing a more nuanced and effective strategy for navigating the complex landscape of HLS directive optimization, enabling a more efficient exploration of the design space and prioritization of search strategies. Specifically, our approach makes a significant improvement to the Pareto frontier in directive design, enabling a more rapid and efficient design space exploration. This demonstrates not only an increase in optimization performance but also a decrease in computational overhead, thereby promising significant time savings in the circuit design process. This work not only enhances the current state of HLS directive optimization but also makes new avenues for the application of language models in the field of EDA. Our work makes the following key achievements: We propose an LLM-based framework for effective HLS directives design space exploration; We utilize the prior knowledge of LLM and fine-tune an LLM for HLS directives optimization; Empirical results demonstrate this LLM-based approach\u2019s effectiveness. Specifically, we obtain 15% improvement on the normalized ADRS metric, demonstrating superior performance with limited sampling steps compared with current leading algorithms.<\/jats:p>","DOI":"10.1145\/3747291","type":"journal-article","created":{"date-parts":[[2025,7,17]],"date-time":"2025-07-17T11:31:07Z","timestamp":1752751867000},"page":"1-24","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":3,"title":["High-level Synthesis Directives Design Optimization via Large Language Model"],"prefix":"10.1145","volume":"30","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7994-6290","authenticated-orcid":false,"given":"Xufeng","family":"Yao","sequence":"first","affiliation":[{"name":"Computer Science and Engineering, CUHK","place":["Hong Kong, Hong Kong"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9501-9254","authenticated-orcid":false,"given":"Wenqian","family":"Zhao","sequence":"additional","affiliation":[{"name":"The Chinese University of Hong Kong","place":["Hong Kong, Hong Kong"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-5153-6698","authenticated-orcid":false,"given":"Qi","family":"Sun","sequence":"additional","affiliation":[{"name":"Zhejiang University","place":["Hangzhou, China"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2610-7522","authenticated-orcid":false,"given":"Cheng","family":"Zhuo","sequence":"additional","affiliation":[{"name":"Zhejiang University","place":["Hangzhou, China"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6406-4810","authenticated-orcid":false,"given":"Bei","family":"Yu","sequence":"additional","affiliation":[{"name":"CUHK","place":["Hong Kong, Hong Kong"]}]}],"member":"320","published-online":{"date-parts":[[2025,9,11]]},"reference":[{"key":"e_1_3_1_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2009.69"},{"key":"e_1_3_1_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2011.2110592"},{"key":"e_1_3_1_4_2","volume-title":"High-Level Synthesis: Introduction to Chip and System Design","author":"Gajski Daniel D","year":"2012","unstructured":"Daniel D Gajski, Nikil D Dutt, Allen CH Wu, and Steve YL Lin. 2012. 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