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Mitigation of the high parasitic resistance within an advanced-node static RAM (SRAM)-based last-level cache (LLC) is the main target of this article. To achieve this target, we augment the LLC interconnect with some degree of reconfiguration by utilizing a dynamic segmented bus (DSB). With DSB, the interconnect segments that are most actively used for a given workload can be shortened, on average, contributing to a smaller capacitive load. Hence, the efficient reconfiguration of an LLC interconnect strongly depends on the LLC demands of the application. To account for this workload dependency, we design the required microarchitectural support in an end-to-end application-to-technology flow. By optimizing the overhead of DSB switches and additional hardware modules, the SRAM-based LLC with DSB-augmented intra-macro interconnect achieves 33% energy savings and 16% reduction in total access time across eight representative workloads, with a negligible area overhead of less than 0.4%.<\/jats:p>","DOI":"10.1145\/3762649","type":"journal-article","created":{"date-parts":[[2025,9,6]],"date-time":"2025-09-06T06:32:47Z","timestamp":1757140367000},"page":"1-26","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["System Scenario-Based Design of the Last-Level Cache in Advanced Interconnect-Dominant Technology Nodes"],"prefix":"10.1145","volume":"24","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-6084-9810","authenticated-orcid":false,"given":"Mahta","family":"Mayahinia","sequence":"first","affiliation":[{"name":"Department of Computer Science, Karlsruhe Institute of Technology (KIT)","place":["Karlsruhe, Germany"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8555-3581","authenticated-orcid":false,"given":"Tommaso","family":"Marinelli","sequence":"additional","affiliation":[{"name":"imec","place":["Leuven, Belgium"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-0926-2838","authenticated-orcid":false,"given":"Zhenlin","family":"Pei","sequence":"additional","affiliation":[{"name":"The University of Texas at Arlington","place":["Arlington, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2305-4258","authenticated-orcid":false,"given":"Hsiao-Hsuan","family":"Liu","sequence":"additional","affiliation":[{"name":"Katholieke Universiteit Leuven","place":["Leuven, Belgium"]},{"name":"imec","place":["Leuven, Belgium"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9161-1728","authenticated-orcid":false,"given":"Chenyun","family":"Pan","sequence":"additional","affiliation":[{"name":"The University of Texas at Arlington","place":["Arlington, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3545-3424","authenticated-orcid":false,"given":"Zsolt","family":"Tokei","sequence":"additional","affiliation":[{"name":"imec","place":["Leuven, Belgium"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3599-8515","authenticated-orcid":false,"given":"Francky","family":"Catthoor","sequence":"additional","affiliation":[{"name":"Microlab, National Technical University of Athens","place":["Athens, Greece"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8829-5610","authenticated-orcid":false,"given":"Mehdi","family":"Tahoori","sequence":"additional","affiliation":[{"name":"Department of Computer Science, Karlsruhe Institute of Technology (KIT)","place":["Karlsruhe, Germany"]},{"name":"imec","place":["Karlsruhe, Germany"]}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2025,9,26]]},"reference":[{"key":"e_1_3_2_2_2","unstructured":"[n. d.]. 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