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RISC-V has emerged as the de facto standard architecture for modern computing platforms at the edge tasked with deep-learning workloads, a trend reinforced by the increasing availability of commercial solutions tailored for inference. This survey delivers a structured taxonomy of the hardware architectures for deep learning at the edge, classified according to how they process data in parallel, represent data, and optimize data movement and whether they implement an application-specific design, and of the supporting software tools, ranging from hardware-software co-design approaches to autotuning and compiler frameworks. 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