{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,19]],"date-time":"2026-03-19T14:36:46Z","timestamp":1773931006368,"version":"3.50.1"},"reference-count":33,"publisher":"Association for Computing Machinery (ACM)","issue":"1","funder":[{"DOI":"10.13039\/501100012166","name":"National Key R&D Program of China","doi-asserted-by":"crossref","award":["2022YFB2901100"],"award-info":[{"award-number":["2022YFB2901100"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Embed. Comput. Syst."],"published-print":{"date-parts":[[2026,1,31]]},"abstract":"<jats:p>\n                    Micro base stations, with limited antennas and extensive deployment, require scaled-down hardware. Software-defined radio solutions (e.g., CPU, many-core systems, GPU) offer flexibility but incur high area and power costs, while traditional DSP lacks efficient acceleration for smaller configurations. The key challenge for micro base stations is achieving minimal area and power overhead while meeting 5G requirements. This article presents a hardware-software co-designed architecture, Sayram, which minimizes overhead for 5G physical layer processing. Sayram integrates an instruction fusion mechanism, along with the compiler for simplified programming, a Vector Indirect Addressing Memory (VIAM) to minimize memory access cycles, and an improved vector register design to accelerate small-scale matrix computation, thereby improving overall processor efficiency. Operating at 1 GHz, Sayram achieves 158 GOPS with a 1.18 mm\n                    <jats:inline-formula content-type=\"math\/tex\">\n                      <jats:tex-math notation=\"LaTeX\" version=\"MathJax\">\\(^2\\)<\/jats:tex-math>\n                    <\/jats:inline-formula>\n                    area, supporting 2T2R and 4T4R Physical Uplink Shared Channel (PUSCH) processing in single-core and dual-core modes, respectively. Evaluations show that Sayram\u2019s area efficiency is 3\u00d7 and 9\u00d7 higher than traditional DSP and CGRA architectures, respectively, with power efficiency improvements of 44\u00d7 and 6\u00d7. Sayram\u2019s energy and area efficiency surpass CPU solutions by orders of magnitude.\n                  <\/jats:p>","DOI":"10.1145\/3776744","type":"journal-article","created":{"date-parts":[[2025,11,13]],"date-time":"2025-11-13T11:30:20Z","timestamp":1763033420000},"page":"1-22","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":1,"title":["Sayram: A Hardware-software Co-design to Accelerate Wireless Baseband Processing"],"prefix":"10.1145","volume":"25","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-7241-9703","authenticated-orcid":false,"given":"Xinbing","family":"Zhou","sequence":"first","affiliation":[{"name":"School of Information and Communication Engineering, Hainan University","place":["Haikou, China"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4172-8906","authenticated-orcid":false,"given":"Shaobo","family":"Shi","sequence":"additional","affiliation":[{"name":"Ultichip Communication Technology","place":["Beijing, China"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-2146-4632","authenticated-orcid":false,"given":"Shaohan","family":"Liu","sequence":"additional","affiliation":[{"name":"Ultichip Communication Technology","place":["Beijing, China"]}]},{"ORCID":"https:\/\/orcid.org\/0009-0005-1200-701X","authenticated-orcid":false,"given":"Peng","family":"Hao","sequence":"additional","affiliation":[{"name":"Northwestern Polytechnical University","place":["Xi'an, China"]}]},{"ORCID":"https:\/\/orcid.org\/0009-0008-1155-7177","authenticated-orcid":false,"given":"Yunxiang","family":"Tang","sequence":"additional","affiliation":[{"name":"Ultichip Communication Technology","place":["Beijing, China"]}]},{"ORCID":"https:\/\/orcid.org\/0009-0002-5494-8887","authenticated-orcid":false,"given":"Tiancheng","family":"Tang","sequence":"additional","affiliation":[{"name":"School of Electronic Engineering, Beijing University of Posts and Telecommunications","place":["Beijing, China"]}]},{"ORCID":"https:\/\/orcid.org\/0009-0006-7852-8069","authenticated-orcid":false,"given":"Yi","family":"Man","sequence":"additional","affiliation":[{"name":"School of Electronic Engineering, Beijing University of Posts and Telecommunications","place":["Beijing, China"]}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4644-4892","authenticated-orcid":false,"given":"Dake","family":"Liu","sequence":"additional","affiliation":[{"name":"Ultichip Communication Technology","place":["Beijing, China"]}]}],"member":"320","published-online":{"date-parts":[[2026,1,7]]},"reference":[{"key":"e_1_3_1_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2021.3112301"},{"key":"e_1_3_1_3_2","doi-asserted-by":"publisher","DOI":"10.1109\/MCOMSTD.001.1800036"},{"key":"e_1_3_1_4_2","doi-asserted-by":"publisher","DOI":"10.1109\/COMST.2016.2571730"},{"key":"e_1_3_1_5_2","doi-asserted-by":"publisher","DOI":"10.1109\/MWC.002.2300024"},{"key":"e_1_3_1_6_2","volume-title":"NR; Physical channels and modulation (Release 16)","author":"3rd Generation Partnership Project (3GPP)","year":"2020","unstructured":"3rd Generation Partnership Project (3GPP) 2020. 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