{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,15]],"date-time":"2026-03-15T15:31:13Z","timestamp":1773588673475,"version":"3.50.1"},"publisher-location":"New York, NY, USA","reference-count":84,"publisher":"ACM","content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2026,3,22]]},"DOI":"10.1145\/3779212.3790228","type":"proceedings-article","created":{"date-parts":[[2026,3,10]],"date-time":"2026-03-10T13:55:26Z","timestamp":1773150926000},"page":"1897-1911","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["STRAW: Stress-Aware WL-Based Read Disturbance Management for High-Density NAND Flash Memory"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-8188-4324","authenticated-orcid":false,"given":"Myoungjun","family":"Chun","sequence":"first","affiliation":[{"name":"Soongsil University, Seoul, Republic of Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-2724-8888","authenticated-orcid":false,"given":"Jaeyong","family":"Lee","sequence":"additional","affiliation":[{"name":"Seoul National University, Seoul, Republic of Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8928-9765","authenticated-orcid":false,"given":"Inhyuk","family":"Choi","sequence":"additional","affiliation":[{"name":"Seoul National University, Seoul, Republic of Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-1826-9003","authenticated-orcid":false,"given":"Jisung","family":"Park","sequence":"additional","affiliation":[{"name":"POSTECH, Pohang, Republic of Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8667-3198","authenticated-orcid":false,"given":"Myungsuk","family":"Kim","sequence":"additional","affiliation":[{"name":"Kyungpook National University, Daegu, Republic of Korea"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-7977-9883","authenticated-orcid":false,"given":"Jihong","family":"Kim","sequence":"additional","affiliation":[{"name":"Seoul National University, Seoul, Republic of Korea"}]}],"member":"320","published-online":{"date-parts":[[2026,3,22]]},"reference":[{"key":"e_1_3_2_1_1_1","unstructured":"Amey Agrawal Nitin Kedia Ashish Panwar Jayashree Mohan Nipun Kwatra Bhargav Gulavani Alexey Tumanov and Ramachandran Ramjee. 2024. Taming Throughput-Latency Tradeoff in LLM Inference with Sarathi-Serve. In OSDI."},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2025.3534187"},{"key":"e_1_3_2_1_3_1","volume-title":"FIO: Flexible I\/O Tester. https:\/\/github.com\/axboe\/fio.","author":"Axboe Jens","year":"2006","unstructured":"Jens Axboe. 2006. FIO: Flexible I\/O Tester. https:\/\/github.com\/axboe\/fio."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2017.2713127"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-981-13-0599-3_9"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Saugata Ghose Yixin Luo Ken Mai Onur Mutlu and Erich F Haratsch. 2017b. Vulnerabilities in MLC NAND Flash Memory Programming: Experimental Analysis Exploits and Mitigation Techniques. In HPCA.","DOI":"10.1109\/HPCA.2017.61"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Erich F. Haratsch Onur Mutlu and Ken Mai. 2012a. Error Patterns in MLC NAND Flash Memory: Measurement Characterization and Analysis. In DATE.","DOI":"10.1109\/DATE.2012.6176524"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Erich F. Haratsch Onur Mutlu and Ken Mai. 2013a. Threshold Voltage Distribution in MLC NAND Flash Memory: Characterization Analysis and Modeling. In DATE.","DOI":"10.7873\/DATE.2013.266"},{"key":"e_1_3_2_1_9_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Yixin Luo Saugata Ghose and Onur Mutlu. 2015a. Read Disturb Errors in MLC NAND Flash Memory: Characterization Mitigation and Recovery. In DSN.","DOI":"10.1109\/DSN.2015.49"},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Yixin Luo Erich F. Haratsch Ken Mai and Onur Mutlu. 2015b. Data Retention in MLC NAND Flash Memory: Characterization Optimization and Recovery. In HPCA.","DOI":"10.1109\/HPCA.2015.7056062"},{"key":"e_1_3_2_1_11_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Onur Mutlu Erich F Haratsch and Ken Mai. 2013b. Program Interference in MLC NAND Flash Memory: Characterization Modeling and Mitigation. In ICCD.","DOI":"10.1109\/ICCD.2013.6657034"},{"key":"e_1_3_2_1_12_1","unstructured":"Yu Cai Gulay Yalcin Onur Mutlu Erich F. Haratsch Adrian Crista Osman S. Unsal et al. 2013c. Error Analysis and Retention-Aware Management for NAND Flash Memory. Intel Tech. J. (2013)."},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"crossref","unstructured":"Yu Cai Gulay Yalcin Onur Mutlu Erich F. Haratsch Adrian Cristal Osman S. Unsal et al. 2012b. Flash Correct-and-Refresh: Retention-Aware Error Management for Increased Flash Memory Lifetime. In ICCD.","DOI":"10.1109\/ICCD.2012.6378623"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"crossref","unstructured":"Jiho Cho D Chris Kang Jongyeol Park Sang-Wan Nam Jung-Ho Song Bong-Kil Jung Jaedoeg Lyu Hogil Lee Won-Tae Kim Hongsoo Jeon et al. 2021. 30.3 A 512Gb 3b\/Cell 7th-Generation 3D-NAND Flash Memory with 184MB\/s Write Throughput and 2.0 Gb\/s Interface. In ISSCC.","DOI":"10.1109\/ISSCC42613.2021.9366054"},{"key":"e_1_3_2_1_15_1","volume-title":"AERO: Adaptive Erase Operation for Improving Lifetime and Performance of Modern NAND Flash-Based SSDs. In ASPLOS.","author":"Cho Sungjun","year":"2024","unstructured":"Sungjun Cho, Beomjun Kim, Hyunuk Cho, Gyeongseob Seo, Onur Mutlu, Myungsuk Kim, and Jisung Park. 2024. AERO: Adaptive Erase Operation for Improving Lifetime and Performance of Modern NAND Flash-Based SSDs. In ASPLOS."},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"crossref","unstructured":"Wanik Cho Jongseok Jung Jongwoo Kim Junghoon Ham Sangkyu Lee Yujong Noh Dauni Kim Wanseob Lee Kayoung Cho Kwanho Kim et al. 2022. A 1-Tb 4b\/Cell 176-Stacked-WL 3D-NAND Flash Memory with Improved Read Latency and a 14.8 Gb\/mm$^2$ Density. In ISSCC.","DOI":"10.1109\/ISSCC42614.2022.9731785"},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"crossref","unstructured":"Eun-Seok Choi and Sung-Kye Park. 2012. Device Considerations for High Density and Highly Reliable 3D NAND Flash Cell in Near Future. In IEDM.","DOI":"10.1109\/IEDM.2012.6479011"},{"key":"e_1_3_2_1_18_1","volume-title":"ReadGuard: Integrated SSD Management for Priority-Aware Read Performance Differentiation. ACM TOS","author":"Chun Myoungjun","year":"2024","unstructured":"Myoungjun Chun, Myungsuk Kim, Dusol Lee, Jisung Park, and Jihong Kim. 2024a. ReadGuard: Integrated SSD Management for Priority-Aware Read Performance Differentiation. ACM TOS (2024)."},{"key":"e_1_3_2_1_19_1","unstructured":"Myoungjun Chun Jaeyong Lee Myungsuk Kim Jisung Park and Jihong Kim. 2024b. RiF: Improving Read Performance of Modern SSDs Using an On-Die Early-Retry Engine. In HPCA."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"crossref","unstructured":"Brian F Cooper Adam Silberstein Erwin Tam Raghu Ramakrishnan and Russell Sears. 2010. Benchmarking Cloud Serving Systems with YCSB. In SoCC.","DOI":"10.1145\/1807128.1807152"},{"key":"e_1_3_2_1_21_1","volume-title":"Finding Frequent Items in Data Streams. PVLDB","author":"Cormode Graham","year":"2008","unstructured":"Graham Cormode and Marios Hadjieleftheriou. 2008. Finding Frequent Items in Data Streams. PVLDB (2008)."},{"key":"e_1_3_2_1_22_1","volume-title":"Methods for Finding Frequent Items in Data Streams. The VLDB Journal","author":"Cormode Graham","year":"2010","unstructured":"Graham Cormode and Marios Hadjieleftheriou. 2010. Methods for Finding Frequent Items in Data Streams. The VLDB Journal (2010)."},{"key":"e_1_3_2_1_23_1","volume-title":"Improving 3D NAND SSD Read Performance by Parallelizing Read-Retry","author":"Cui Jinhua","year":"2022","unstructured":"Jinhua Cui, Zhimin Zeng, Jianhang Huang, Weiqi Yuan, and Laurence T Yang. 2022. Improving 3D NAND SSD Read Performance by Parallelizing Read-Retry. IEEE TCAD (2022)."},{"key":"e_1_3_2_1_24_1","volume-title":"On the Need for a Tunneling Pre-Factor in Fowler-Nordheim Tunneling Theory. Journal of Applied Physics","author":"Forbes Richard G","year":"2008","unstructured":"Richard G Forbes. 2008. On the Need for a Tunneling Pre-Factor in Fowler-Nordheim Tunneling Theory. Journal of Applied Physics (2008)."},{"key":"e_1_3_2_1_25_1","volume-title":"An Integrated Approach for Managing Read Disturbs in High-Density NAND Flash Memory","author":"Ha Keonsoo","year":"2015","unstructured":"Keonsoo Ha, Jaeyong Jeong, and Jihong Kim. 2015. An Integrated Approach for Managing Read Disturbs in High-Density NAND Flash Memory. IEEE TCAD (2015)."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2023.3240172"},{"key":"e_1_3_2_1_27_1","unstructured":"Mingzhe Hao Gokul Soundararajan Deepak Kenchammana-Hosekote Andrew A Chien and Haryadi S Gunawi. 2016. The Tail at Store: A Revelation from Millions of Hours of Disk and SSD Deployments. In FAST."},{"key":"e_1_3_2_1_28_1","unstructured":"Duwon Hong Myungsuk Kim Geonhee Cho Dusol Lee and Jihong Kim. 2022. GuardedErase: Extending SSD Lifetimes by Protecting Weak Wordlines. In FAST."},{"key":"e_1_3_2_1_29_1","unstructured":"SK Hynix. 2023. SK Hynix Enterprise SSDs. https:\/\/product.skhynix.com\/products\/ssd\/essd.go."},{"key":"e_1_3_2_1_30_1","volume-title":"Jae-Hun Jeong, Byoung-Keun Son, Dong Woo Kim, Jae-Joo Shim, et al.","author":"Jang Jaehoon","year":"2009","unstructured":"Jaehoon Jang, Han-Soo Kim, Wonseok Cho, Hoosung Cho, Jinho Kim, Sun Il Shim, Jae-Hun Jeong, Byoung-Keun Son, Dong Woo Kim, Jae-Joo Shim, et al., 2009. Vertical Cell Array Using TCAT (Terabit Cell Array Transistor) Technology for Ultra High Density NAND Flash Memory. In VLSI."},{"key":"e_1_3_2_1_31_1","unstructured":"JEDEC. 2018. JESD22-A117: Electrically Erasable Programmable ROM (EEPROM) Program \/ Erase Endurance and Data Retention Stress Tests. https:\/\/www.jedec.org\/sites\/default\/files\/docs\/22A117B.pdf"},{"key":"e_1_3_2_1_32_1","unstructured":"JEDEC. 2022. JESD47L: Stress-Test-Driven Qualification of Integrated Circuits. https:\/\/www.jedec.org\/standards-documents\/docs\/jesd-47g"},{"key":"e_1_3_2_1_33_1","volume-title":"Rezaul Haque, Owen W Jungroth, Steven Law, Aliasgar S Madraswala, Binh Ngo, et al.","author":"Khakifirooz Ali","year":"2021","unstructured":"Ali Khakifirooz, Sriram Balasubrahmanyam, Richard Fastow, Kristopher H Gaewsky, Chang Wan Ha, Rezaul Haque, Owen W Jungroth, Steven Law, Aliasgar S Madraswala, Binh Ngo, et al., 2021. 30.2 A 1Tb 4b\/Cell 144-Tier Floating-Gate 3D-NAND Flash Memory with 40MB\/s Program Throughput and 13.8Gb\/mm$^2$ Bit Density. In ISSCC."},{"key":"e_1_3_2_1_34_1","unstructured":"Bvunarvul Kim Seungpil Lee Beomseok Hah Kanawoo Park Yongsoon Park Kangwook Jo Yujong Noh Hyeoncheon Seol Hyunsoo Lee Jaehyeon Shin et al. 2023a. 28.2 A High-Performance 1Tb 3b\/Cell 3D-NAND Flash with a 194MB\/s Write Throughput on over 300 Layers $mathsfi$. In ISSCC."},{"key":"e_1_3_2_1_35_1","unstructured":"Bryan S Kim Jongmoo Choi and Sang Lyul Min. 2019b. Design Tradeoffs for SSD Reliability. In FAST."},{"key":"e_1_3_2_1_36_1","volume-title":"NORNS: Three Guides for Efficient Automatic Post-Fabrication Optimization of Modern NAND Flash Memory. In ICCAD.","author":"Kim Earl","year":"2024","unstructured":"Earl Kim, Hyunuk Cho, Sungjun Cho, Myungsuk Kim, Jisung Park, Jaeyong Jeong, Eunkyoung Kim, and Sunghoi Hur. 2024. NORNS: Three Guides for Efficient Automatic Post-Fabrication Optimization of Modern NAND Flash Memory. In ICCAD."},{"key":"e_1_3_2_1_37_1","doi-asserted-by":"publisher","DOI":"10.1145\/3453953.3453980"},{"key":"e_1_3_2_1_38_1","unstructured":"Myungsuk Kim Jaehoon Lee Sungjin Lee Jisung Park Youngsun Song and Jihong Kim. 2017. Improving Performance and Lifetime of Large-Page NAND Storages Using Erase-Free Subpage Programming. In DAC."},{"key":"e_1_3_2_1_39_1","volume-title":"Tae Jun Ham, and Jae W Lee","author":"Kim Shine","year":"2019","unstructured":"Shine Kim, Jonghyun Bae, Hakbeom Jang, Wenjing Jin, Jeonghun Gong, Seungyeon Lee, Tae Jun Ham, and Jae W Lee. 2019a. Practical Erase Suspension for Modern Low-Latency SSDs. In USENIX ATC."},{"key":"e_1_3_2_1_40_1","unstructured":"Sang-Hoon Kim Jaehoon Shim Euidong Lee Seongyeop Jeong Ilkueon Kang and Jin-Soo Kim. 2023b. NVMeVirt: A Versatile Software-Defined Virtual NVMe Device. In FAST."},{"key":"e_1_3_2_1_41_1","volume-title":"MQSim-E: An Enterprise SSD Simulator","author":"Lee Dusol","year":"2022","unstructured":"Dusol Lee, Duwon Hong, Wonil Choi, and Jihong Kim. 2022. MQSim-E: An Enterprise SSD Simulator. IEEE CAL (2022)."},{"key":"e_1_3_2_1_42_1","unstructured":"Seungjae Lee Jin-yub Lee Il-han Park Jongyeol Park Sung-won Yun Min-su Kim Jong-hoon Lee Minseok Kim Kangbin Lee Taeeun Kim et al. 2016. 7.5 A 128Gb 2b\/Cell NAND Flash Memory in 14nm Technology with tPROG=640\u00b5s and 800MB\/s I\/O Rate. In ISSCC."},{"key":"e_1_3_2_1_43_1","volume-title":"Mitigating Negative Impacts of Read Disturb in SSDs. TODAES","author":"Li Jun","year":"2020","unstructured":"Jun Li, Bowen Huang, Zhibing Sha, Zhigang Cai, Jianwei Liao, Balazs Gerofi, and Yutaka Ishikawa. 2020a. Mitigating Negative Impacts of Read Disturb in SSDs. TODAES (2020)."},{"key":"e_1_3_2_1_44_1","unstructured":"Qiao Li Min Ye Yufei Cui Liang Shi Xiaoqiang Li Tei-Wei Kuo and Chun Jason Xue. 2020b. Shaving Retries with Sentinels for Fast Read over High-Density 3D Flash. In MICRO."},{"key":"e_1_3_2_1_45_1","volume-title":"Read Refresh Scheduling and Data Reallocation against Read Disturb in SSDs. ACM TECS","author":"Liao Jianwei","year":"2022","unstructured":"Jianwei Liao, Jun Li, Mingwang Zhao, Zhibing Sha, and Zhigang Cai. 2022. Read Refresh Scheduling and Data Reallocation against Read Disturb in SSDs. ACM TECS (2022)."},{"key":"e_1_3_2_1_46_1","volume-title":"RAIL: Predictable, Low Tail Latency for NVMe Flash. ACM TOS","author":"Litz Heiner","year":"2022","unstructured":"Heiner Litz, Javier Gonzalez, Ana Klimovic, and Christos Kozyrakis. 2022. RAIL: Predictable, Low Tail Latency for NVMe Flash. ACM TOS (2022)."},{"key":"e_1_3_2_1_47_1","doi-asserted-by":"crossref","unstructured":"Yixin Luo Saugata Ghose Yu Cai Erich F. Haratsch and Onur Mutlu. 2018. Improving 3D NAND Flash Memory Lifetime by Tolerating Early Retention Loss and Process Variation. In SIGMETRICS.","DOI":"10.1145\/3219617.3219659"},{"key":"e_1_3_2_1_48_1","unstructured":"Richard McDougall and Jim Mauro. 2005. FileBench. https:\/\/github.com\/filebench\/filebench."},{"key":"e_1_3_2_1_49_1","doi-asserted-by":"crossref","unstructured":"Ahmed Metwally Divyakant Agrawal and Amr El Abbadi. 2005. Efficient Computation of Frequent and Top-k Elements in Data Streams. In ICDT.","DOI":"10.1007\/978-3-540-30570-5_27"},{"key":"e_1_3_2_1_50_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-90-481-9431-5"},{"key":"e_1_3_2_1_51_1","unstructured":"Micron. 2006. NAND Flash Design and Use Considerations. https:\/\/media-www.micron.com\/-\/media\/client\/global\/documents\/products\/technical-note\/nand-flash\/tn2917.pdf"},{"key":"e_1_3_2_1_52_1","unstructured":"Micron. 2019. SSDs and SMART Data. https:\/\/www.crucial.com\/support\/articles-faq-ssd\/ssds-and-smart-data."},{"key":"e_1_3_2_1_53_1","unstructured":"Micron. 2023. 232-Layer NAND Flash Memory. https:\/\/www.micron.com\/products\/nand-flash\/232-layer-nand."},{"key":"e_1_3_2_1_54_1","unstructured":"ONFI Workgorup. 2024. Open NAND Flash Interface Specification Revision 5.2. https:\/\/onfi.org\/files\/ONFI_5_2_Rev1.0.pdf"},{"key":"e_1_3_2_1_55_1","unstructured":"Yuqian Pan Haichun Zhang Mingyang Gong and Zhenglin Liu. 2020. Process-Variation Effects on 3D TLC Flash Reliability: Characterization and Mitigation Scheme. In QRS."},{"key":"e_1_3_2_1_56_1","doi-asserted-by":"crossref","unstructured":"Jisung Park Roknoddin Azizi Geraldo F Oliveira Mohammad Sadrosadati Rakesh Nadig David Novo Juan G\u00f3mez-Luna Myungsuk Kim and Onur Mutlu. 2022. Flash-Cosmos: In-Flash Bulk Bitwise Operations Using Inherent Computation Capability of NAND Flash Memory. In MICRO.","DOI":"10.1109\/MICRO56248.2022.00069"},{"key":"e_1_3_2_1_57_1","doi-asserted-by":"crossref","unstructured":"Jisung Park Jaeyong Jeong Sungjin Lee Youngsun Song and Jihong Kim. 2016. Improving Performance and Lifetime of NAND Storage Systems Using Relaxed Program Sequence. In DAC.","DOI":"10.1145\/2897937.2898032"},{"key":"e_1_3_2_1_58_1","doi-asserted-by":"crossref","unstructured":"Jisung Park Myungsuk Kim Myoungjun Chun Lois Orosa Jihong Kim and Onur Mutlu. 2021a. Reducing Solid-State Drive Read Latency by Optimizing Read-Retry. In ASPLOS.","DOI":"10.1145\/3445814.3446719"},{"key":"e_1_3_2_1_59_1","doi-asserted-by":"crossref","unstructured":"Jae-Woo Park Doogon Kim Sunghwa Ok Jaebeom Park Taeheui Kwon Hyunsoo Lee Sungmook Lim Sun-Young Jung Hyeongjin Choi Taikyu Kang et al. 2021b. 30.1 A 176-Stacked 512Gb 3b\/Cell 3D-NAND Flash with 10.8 Gb\/mm$^2$ Density with a Peripheral Circuit Under Cell Array Architecture. In ISSCC.","DOI":"10.1109\/ISSCC42613.2021.9365809"},{"key":"e_1_3_2_1_60_1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2020.3047484"},{"key":"e_1_3_2_1_61_1","unstructured":"Tianyu Ren Qiao Li Min Ye and Chun Jason Xue. 2023. Read Disturb and Reliability: The Complete Story for 3D CT NAND Flash. In NVMSA."},{"key":"e_1_3_2_1_62_1","unstructured":"Samsung. 2015. Communicating With Your SSD: Understanding SMART Attributes. https:\/\/web.archive.org\/web\/20150402093935\/http:\/\/www.samsung.com\/global\/business\/semiconductor\/minisite\/SSD\/downloads\/document\/07_Communicating_With_Your_SSD.pdf."},{"key":"e_1_3_2_1_63_1","volume-title":"QLC SSD: High Density, High Performance and Affordable Solution for Client PCs. https:\/\/download.semiconductor.samsung.com\/resources\/white-paper\/Samsung_SSD_860_QVO_White_paper.pdf.","year":"2019","unstructured":"Samsung. 2019. QLC SSD: High Density, High Performance and Affordable Solution for Client PCs. https:\/\/download.semiconductor.samsung.com\/resources\/white-paper\/Samsung_SSD_860_QVO_White_paper.pdf."},{"key":"e_1_3_2_1_64_1","unstructured":"Samsung. 2023. Samsung Enterprise SSDs. https:\/\/semiconductor.samsung.com\/ssd\/enterprise-ssd\/."},{"key":"e_1_3_2_1_65_1","first-page":"984","article-title":"Cascaded E-Fuse Switch Circuits to Control Data Backup in a Storage Device","volume":"9","author":"Seshasayee Nikhil","year":"2018","unstructured":"Nikhil Seshasayee and Keith Neil MacLean. 2018. Cascaded E-Fuse Switch Circuits to Control Data Backup in a Storage Device. US Patent 9,984,762.","journal-title":"US Patent"},{"key":"e_1_3_2_1_66_1","volume-title":"Kaijie Wu, and Edwin H-M Sha.","author":"Shi Liang","year":"2015","unstructured":"Liang Shi, Yejia Di, Mengying Zhao, Chun Jason Xue, Kaijie Wu, and Edwin H-M Sha. 2015. Exploiting Process Variation for Write Performance Improvement on NAND Flash Memory Storage Systems. IEEE TVLSI (2015)."},{"key":"e_1_3_2_1_67_1","unstructured":"Youngseop Shim Myungsuk Kim Myoungjun Chun Jisung Park Yoona Kim and Jihong Kim. 2019. Exploiting Process Similarity of 3D Flash Memory for High Performance SSDs. In MICRO."},{"key":"e_1_3_2_1_68_1","unstructured":"Ikjoon Son and Jin-Soo Kim. 2023. Efficient Read Disturb Management Schemes in Resource-Constrained Flash Memory Controller. In NVMSA."},{"key":"e_1_3_2_1_69_1","unstructured":"Arash Tavakkol Juan G\u00f3mez-Luna Mohammad Sadrosadati Saugata Ghose and Onur Mutlu. 2018a. MQSim: A Framework for Enabling Realistic Studies of Modern Multi-Queue SSD Devices. In FAST."},{"key":"e_1_3_2_1_70_1","volume-title":"Lois Orosa, Juan G\u00f3mez-Luna, and Onur Mutlu.","author":"Tavakkol Arash","year":"2018","unstructured":"Arash Tavakkol, Mohammad Sadrosadati, Saugata Ghose, Jeremie Kim, Yixin Luo, Yaohua Wang, Nika Mansouri Ghiasi, Lois Orosa, Juan G\u00f3mez-Luna, and Onur Mutlu. 2018b. FLIN: Enabling Fairness and Enhancing Performance in Modern NVMe Solid State Drives. In ISCA."},{"key":"e_1_3_2_1_71_1","volume-title":"Llama: Open and Efficient Foundation Language Models. arXiv","author":"Touvron Hugo","year":"2023","unstructured":"Hugo Touvron, Thibaut Lavril, Gautier Izacard, Xavier Martinet, Marie-Anne Lachaux, Timoth\u00e9e Lacroix, Baptiste Rozi\u00e8re, Naman Goyal, Eric Hambro, Faisal Azhar, et al., 2023. Llama: Open and Efficient Foundation Language Models. arXiv (2023)."},{"key":"e_1_3_2_1_72_1","volume-title":"LUMOS: Dependency-Driven Disk-Based Graph Processing. In USENIX ATC.","author":"Vora Keval","year":"2019","unstructured":"Keval Vora. 2019. LUMOS: Dependency-Driven Disk-Based Graph Processing. In USENIX ATC."},{"key":"e_1_3_2_1_73_1","volume-title":"PVSensing: a Process-Variation-Aware Space Allocation Strategy for 3D NAND Flash Memory","author":"Wang Yi","year":"2021","unstructured":"Yi Wang, Jiangfan Huang, Jing Chen, and Rui Mao. 2021. PVSensing: a Process-Variation-Aware Space Allocation Strategy for 3D NAND Flash Memory. IEEE TCAD (2021)."},{"key":"e_1_3_2_1_74_1","unstructured":"Guanying Wu and Xubin He. 2012. Reducing SSD Read Latency via NAND Flash Program and Erase Suspension. In FAST."},{"key":"e_1_3_2_1_75_1","doi-asserted-by":"publisher","DOI":"10.1145\/3162616"},{"key":"e_1_3_2_1_76_1","volume-title":"Swaminathan Sundararaman, Andrew A Chien, and Haryadi S Gunawi.","author":"Yan Shiqin","year":"2017","unstructured":"Shiqin Yan, Huaicheng Li, Mingzhe Hao, Michael Hao Tong, Swaminathan Sundararaman, Andrew A Chien, and Haryadi S Gunawi. 2017. Tiny-Tail Flash: Near-Perfect Elimination of Garbage Collection Tail Latencies in NAND SSDs. ACM TOS (2017)."},{"key":"e_1_3_2_1_77_1","doi-asserted-by":"crossref","unstructured":"Min Ye Qiao Li Yina Lv Jie Zhang Tianyu Ren Daniel Wen Tei-Wei Kuo and Chun Jason Xue. 2024. Achieving Near-Zero Read Retry for 3D NAND Flash Memory. In ASPLOS.","DOI":"10.1145\/3620665.3640372"},{"key":"e_1_3_2_1_78_1","volume-title":"Error Diluting: Exploiting 3-D NAND Flash Process Variation for Efficient Read on LDPC-Based SSDs","author":"Yong Kong-Kiat","year":"2020","unstructured":"Kong-Kiat Yong and Li-Pin Chang. 2020a. Error Diluting: Exploiting 3-D NAND Flash Process Variation for Efficient Read on LDPC-Based SSDs. IEEE TCAD (2020)."},{"key":"e_1_3_2_1_79_1","volume-title":"Error Diluting: Exploiting 3D NAND Flash Process Variation for Efficient Read on LDPC-Based SSDs","author":"Yong Kong-Kiat","year":"2020","unstructured":"Kong-Kiat Yong and Li-Pin Chang. 2020b. Error Diluting: Exploiting 3D NAND Flash Process Variation for Efficient Read on LDPC-Based SSDs. IEEE TCAD (2020)."},{"key":"e_1_3_2_1_80_1","doi-asserted-by":"crossref","unstructured":"Cristian Zambelli Piero Olivo Luca Crippa Alessia Marelli and Rino Micheloni. 2017. Uniform and Concentrated Read Disturb Effects in Mid-1X TLC NAND Flash Memories for Enterprise Solid State Drives. In IRPS.","DOI":"10.1109\/IRPS.2017.7936387"},{"key":"e_1_3_2_1_81_1","volume-title":"Cocktail: Mixing Data with Different Characteristics to Reduce Read Reclaims for NAND Flash Memory","author":"Zhang Genxiong","year":"2022","unstructured":"Genxiong Zhang, Yuhui Deng, Yi Zhou, Shujie Pang, Jianhui Yue, and Yifeng Zhu. 2022. Cocktail: Mixing Data with Different Characteristics to Reduce Read Reclaims for NAND Flash Memory. IEEE TCAD (2022)."},{"key":"e_1_3_2_1_82_1","volume-title":"Nam Sung Kim, Jihong Kim, et al.","author":"Zhang Jie","year":"2018","unstructured":"Jie Zhang, Miryeong Kwon, Donghyun Gouk, Sungjoon Koh, Changlim Lee, Mohammad Alian, Myoungjun Chun, Mahmut Taylan Kandemir, Nam Sung Kim, Jihong Kim, et al., 2018. FlashShare: Punching Through Server Storage Stack from Kernel to Firmware for Ultra-Low Latency SSDs. In OSDI."},{"key":"e_1_3_2_1_83_1","doi-asserted-by":"crossref","unstructured":"Mingwang Zhao Jun Li Zhigang Cai Jianwei Liao and Yuanquan Shi. 2021. Block Attribute-Aware Data Reallocation to Alleviate Read Disturb in SSDs. In DATE.","DOI":"10.23919\/DATE51398.2021.9474023"},{"key":"e_1_3_2_1_84_1","unstructured":"Timothy Zhu Michael A Kozuch and Mor Harchol-Balter. 2017. WorkloadCompactor: Reducing Datacenter Cost While Providing Tail Latency SLO Guarantees. In SoCC."}],"event":{"name":"ASPLOS '26: 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems","location":"Pittsburgh PA USA","sponsor":["SIGOPS ACM Special Interest Group on Operating Systems","SIGPLAN ACM Special Interest Group on Programming Languages","SIGARCH ACM Special Interest Group on Computer Architecture","SIGBED ACM Special Interest Group on Embedded Systems"]},"container-title":["Proceedings of the 31st ACM International Conference on Architectural Support for Programming Languages and Operating Systems, Volume 2"],"original-title":[],"deposited":{"date-parts":[[2026,3,15]],"date-time":"2026-03-15T14:04:53Z","timestamp":1773583493000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3779212.3790228"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,3,22]]},"references-count":84,"alternative-id":["10.1145\/3779212.3790228","10.1145\/3779212"],"URL":"https:\/\/doi.org\/10.1145\/3779212.3790228","relation":{},"subject":[],"published":{"date-parts":[[2026,3,22]]},"assertion":[{"value":"2026-03-22","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}