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Syst."],"published-print":{"date-parts":[[2026,6,30]]},"abstract":"<jats:p>This article presents a unified framework for codifying and automating optimization strategies to efficiently deploy deep neural networks (DNNs) on resource-constrained hardware, such as Field-Programmable Gate Arrays (FPGAs), while maintaining high performance, accuracy, and resource efficiency. Deploying DNNs on such platforms involves addressing the significant challenge of balancing performance, resource usage, such as Digital Signal Processing blocks (DSPs) and Look-Up Tables (LUTs), and inference accuracy, which often requires extensive manual effort and domain expertise. Our novel approach addresses two core issues: (i) encoding custom optimization strategies and (ii) enabling cross-stage optimization search. In particular, our proposed framework seamlessly integrates programmatic DNN optimization techniques with high-level synthesis (HLS)-based metaprogramming, leveraging advanced design space exploration (DSE) strategies like Bayesian optimization (BO) to automate both top-down and bottom-up design flows. Hence, we reduce the need for manual intervention and domain expertise. In addition, the framework introduces customizable optimization, transformation, and control blocks to enhance DNN accelerator performance and resource efficiency. We further formalize a cross-stage, constrained BO procedure that couples predicate\u2013action bottom-up feedback (via BRANCH) with FORK\/REDUCE order search, enabling automated selection, ordering, and tuning across software and HLS tasks. Experimental results demonstrate up to a 92% DSP and 89% LUT usage reduction for select networks, while preserving accuracy, along with a 15.6-fold reduction in optimization time compared to grid search. These results highlight the potential for automating the generation of resource-efficient DNN accelerator designs with minimal effort, resulting in large resource savings with bounded exploration cost.<\/jats:p>","DOI":"10.1145\/3795794","type":"journal-article","created":{"date-parts":[[2026,2,9]],"date-time":"2026-02-09T14:21:40Z","timestamp":1770646900000},"page":"1-34","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":6,"title":["MetaML-Pro: Cross-Stage Design Flow Automation for Efficient Deep Learning Acceleration"],"prefix":"10.1145","volume":"19","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-9263-6529","authenticated-orcid":false,"given":"Zhiqiang","family":"Que","sequence":"first","affiliation":[{"name":"Department of Computing, Imperial College London, London, UK"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4138-3709","authenticated-orcid":false,"given":"Jose G. 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