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Syst."],"published-print":{"date-parts":[[2026,9,30]]},"abstract":"<jats:p>\n                    Industry adoption of chiplets has been growing as chiplets are a cost-effective option for making large, high-performance systems. Consequently, partitioning large systems into chiplets is increasingly important. In this work, we introduce\n                    <jats:italic toggle=\"yes\">ChipletPart<\/jats:italic>\n                    \u2014a cost-driven 2.5D system partitioner that addresses the unique constraints of chiplet systems, including complex objective functions, limited reach of inter-chiplet I\/O transceivers, and the assignment of heterogeneous manufacturing technologies to different chiplets.\n                    <jats:italic toggle=\"yes\">ChipletPart<\/jats:italic>\n                    integrates a sophisticated chiplet cost model with a genetic algorithm (GA)-based technology assignment and partitioning methodology, along with a simulated annealing (SA)-based chiplet floorplanner. Our results show that\n                    <jats:italic toggle=\"yes\">ChipletPart<\/jats:italic>\n                    : (i) reduces chiplet cost by up to 58% (20% geometric mean) compared to state-of-the-art min-cut partitioners, which often yield floorplan-infeasible solutions; (ii) generates partitions with up to 47% (6% geometric mean) lower cost compared to the prior work\n                    <jats:italic toggle=\"yes\">Floorplet<\/jats:italic>\n                    ; (iii) reduces chiplet cost up to 48% (30% geometric mean) compared to\n                    <jats:italic toggle=\"yes\">Chipletizer<\/jats:italic>\n                    , while consistently producing I\/O-feasible chiplet solutions across all testcases; and (iv) for the testcases we study, heterogeneous integration reduces cost by up to 43% (15% geometric mean) compared to homogeneous implementations. Additionally, we explore Bayesian optimization (BO) for finding low cost and floorplan-feasible chiplet solutions with technology assignments. On some testcases, our BO framework achieves better system cost (up to 5.3% improvement) with higher runtime overhead (up to 4\u00d7) compared to our GA-based framework. We also present case studies that show how changes in packaging and inter-chiplet signaling technologies can affect partitioning solutions. Finally,\n                    <jats:italic toggle=\"yes\">ChipletPart<\/jats:italic>\n                    , the underlying chiplet cost model, and our chiplet testcase generator are available as open-source tools for the community.\n                  <\/jats:p>","DOI":"10.1145\/3796532","type":"journal-article","created":{"date-parts":[[2026,2,7]],"date-time":"2026-02-07T20:24:13Z","timestamp":1770495853000},"page":"1-29","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["ChipletPart: Cost-Aware Partitioning for 2.5D Systems"],"prefix":"10.1145","volume":"31","author":[{"ORCID":"https:\/\/orcid.org\/0009-0008-2150-3738","authenticated-orcid":false,"given":"Alexander","family":"Graening","sequence":"first","affiliation":[{"name":"University of California Los Angeles","place":["Los Angeles, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6188-1134","authenticated-orcid":false,"given":"Puneet","family":"Gupta","sequence":"additional","affiliation":[{"name":"University of California Los Angeles","place":["Los Angeles, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4490-5018","authenticated-orcid":false,"given":"Andrew","family":"Kahng","sequence":"additional","affiliation":[{"name":"University of California San Diego","place":["La Jolla, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0009-0004-6014-1048","authenticated-orcid":false,"given":"Bodhisatta","family":"Pramanik","sequence":"additional","affiliation":[{"name":"University of California San Diego","place":["La Jolla, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-6669-9702","authenticated-orcid":false,"given":"Zhiang","family":"Wang","sequence":"additional","affiliation":[{"name":"University of California San Diego","place":["La Jolla, United States"]}],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"320","published-online":{"date-parts":[[2026,4,11]]},"reference":[{"key":"e_1_3_2_2_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731673"},{"key":"e_1_3_2_3_2","first-page":"1","volume-title":"ISPD","author":"Sangiovanni-Vincentelli Alberto","year":"2023","unstructured":"Alberto Sangiovanni-Vincentelli, Zheng Liang, Zhe Zhou, and Jiaxi Zhang. 2023. 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