{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,26]],"date-time":"2026-06-26T13:47:07Z","timestamp":1782481627412,"version":"3.54.5"},"reference-count":34,"publisher":"Association for Computing Machinery (ACM)","issue":"2","license":[{"start":{"date-parts":[[2026,6,26]],"date-time":"2026-06-26T00:00:00Z","timestamp":1782432000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by-nc-nd\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/501100012166","name":"National Key R&D Program of China","doi-asserted-by":"crossref","award":["2023YFB3001702"],"award-info":[{"award-number":["2023YFB3001702"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"crossref"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"crossref","award":["62032023, 42104078, 62502048, and 61902411"],"award-info":[{"award-number":["62032023, 42104078, 62502048, and 61902411"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"crossref"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":["ACM Trans. Archit. Code Optim."],"published-print":{"date-parts":[[2026,6,30]]},"abstract":"<jats:p>\n                    Sparse matrix\u2013matrix multiplication (SpMM) is a fundamental operation in scientific computing with broad applications across numerous domains. Tiling is a key optimization technique for improving data locality and is widely adopted in high-performance computing. However, the irregular data access patterns inherent to SpMM make it challenging to exploit tiling effectively for data reuse. In this article, we propose\n                    <jats:bold>MaSpMM<\/jats:bold>\n                    , a\n                    <jats:italic toggle=\"yes\">memory-aware SpMM<\/jats:italic>\n                    framework that integrates cache-aware tiling with a segment-oriented data layout. MaSpMM stores matrices as continuous segments to enhance data locality within each tile. Moreover, since many sparse matrices in real-world applications exhibit symmetry, we further develop MaSpMM-Sym, an extension that recursively partitions symmetric matrices to eliminate write conflicts and further improve locality. To adapt to diverse scenarios, we finally introduce MaSpMM-Adap, which adaptively selects the most suitable approach for each input matrix. Comprehensive evaluations on both x86 and ARM CPUs demonstrate that MaSpMM-Adap achieves average speedups of up to 1.86\u00d7 over Intel oneMKL, 1.84\u00d7 over ASpT, and 1.75\u00d7 over J-Stream.\n                  <\/jats:p>","DOI":"10.1145\/3803422","type":"journal-article","created":{"date-parts":[[2026,4,11]],"date-time":"2026-04-11T11:03:07Z","timestamp":1775905387000},"page":"1-21","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["A Memory-Aware Sparse Matrix-Matrix Multiplication on Multicore Architectures"],"prefix":"10.1145","volume":"23","author":[{"ORCID":"https:\/\/orcid.org\/0009-0009-4488-5473","authenticated-orcid":false,"given":"Deshun","family":"Bi","sequence":"first","affiliation":[{"name":"National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7827-6304","authenticated-orcid":false,"given":"Shengguo","family":"Li","sequence":"additional","affiliation":[{"name":"College of Computer Science, National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0009-0434-8075","authenticated-orcid":false,"given":"Haozhong","family":"Qiu","sequence":"additional","affiliation":[{"name":"National University of Defense Technology College of Computer Science and Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-4876-2368","authenticated-orcid":false,"given":"Chuanfu","family":"Xu","sequence":"additional","affiliation":[{"name":"National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0007-9821-171X","authenticated-orcid":false,"given":"Xiaojian","family":"Yang","sequence":"additional","affiliation":[{"name":"National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0009-0003-9022-0727","authenticated-orcid":false,"given":"Fan","family":"Yuan","sequence":"additional","affiliation":[{"name":"Xiangtan University","place":["Xiangtan, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-6243-8479","authenticated-orcid":false,"given":"Dezun","family":"Dong","sequence":"additional","affiliation":[{"name":"National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-8378-5530","authenticated-orcid":false,"given":"Tiaojie","family":"Xiao","sequence":"additional","affiliation":[{"name":"Laboratory of Digitizing Software for Frontier Equipment, National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3745-7541","authenticated-orcid":false,"given":"Jie","family":"Liu","sequence":"additional","affiliation":[{"name":"Laboratory of Digitizing Software for Frontier Equipment, National University of Defense Technology","place":["Changsha, China"]}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2026,6,26]]},"reference":[{"key":"e_1_3_2_2_2","doi-asserted-by":"publisher","DOI":"10.1145\/3399732"},{"key":"e_1_3_2_3_2","unstructured":"Vicente H. F. Batista George O. Ainsworth Jr. and Fernando L. B. Ribeiro. 2010. Parallel structurally-symmetric sparse matrix-vector products on multi-core processors. arXiv preprint arXiv:1003.0952."},{"key":"e_1_3_2_4_2","first-page":"233","volume-title":"Proceedings of the 21st ACM Symposium on Parallelism in Algorithms and Architectures (SPAA)","author":"Bulu\u00e7 Aydin","year":"2009","unstructured":"Aydin Bulu\u00e7, Jeremy T. Fineman, Matteo Frigo, John R. Gilbert, and Charles E. Leiserson. 2009. Parallel sparse matrix-vector and matrix-transpose-vector multiplication using compressed sparse blocks. In Proceedings of the 21st ACM Symposium on Parallelism in Algorithms and Architectures (SPAA). 233\u2013244."},{"key":"e_1_3_2_5_2","doi-asserted-by":"publisher","DOI":"10.1145\/2049662.2049663"},{"key":"e_1_3_2_6_2","doi-asserted-by":"publisher","DOI":"10.1145\/3295500.3356148"},{"key":"e_1_3_2_7_2","doi-asserted-by":"publisher","DOI":"10.1145\/3620666.3651378"},{"key":"e_1_3_2_8_2","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2013.43"},{"key":"e_1_3_2_9_2","doi-asserted-by":"publisher","DOI":"10.1145\/3208040.3208062"},{"key":"e_1_3_2_10_2","doi-asserted-by":"publisher","DOI":"10.1145\/3293883.3295712"},{"issue":"6","key":"e_1_3_2_11_2","first-page":"582","article-title":"Divide-and-conquer for parallel processing","volume":"100","year":"1983","unstructured":"Horowitz and Zorat. 1983. Divide-and-conquer for parallel processing. IEEE Transactions on Computers 100, 6 (1983), 582\u2013585.","journal-title":"IEEE Transactions on Computers"},{"key":"e_1_3_2_12_2","unstructured":"HPCRL. Accessed: 2025-09. Jstream_SpMM. https:\/\/github.com\/HPCRL\/jstream_SpMM"},{"key":"e_1_3_2_13_2","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2012.51"},{"key":"e_1_3_2_14_2","doi-asserted-by":"publisher","DOI":"10.1145\/3332466.3374546"},{"key":"e_1_3_2_15_2","doi-asserted-by":"publisher","DOI":"10.5555\/3433701.3433816"},{"key":"e_1_3_2_16_2","volume-title":"Introduction to Algorithms","author":"Leiserson Charles Eric","year":"1994","unstructured":"Charles Eric Leiserson, Ronald L. Rivest, Thomas H. Cormen, and Clifford Stein. 1994. Introduction to Algorithms. MIT Press Cambridge, MA, USA."},{"key":"e_1_3_2_17_2","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2023.3337442"},{"key":"e_1_3_2_18_2","doi-asserted-by":"publisher","DOI":"10.1145\/3581784.3607051"},{"key":"e_1_3_2_19_2","doi-asserted-by":"publisher","DOI":"10.1109\/SC41406.2024.00060"},{"key":"e_1_3_2_20_2","doi-asserted-by":"publisher","DOI":"10.1145\/3627535.3638473"},{"key":"e_1_3_2_21_2","doi-asserted-by":"publisher","DOI":"10.1109\/DAC63849.2025.11133082"},{"key":"e_1_3_2_22_2","doi-asserted-by":"publisher","DOI":"10.1145\/3746233"},{"key":"e_1_3_2_23_2","doi-asserted-by":"publisher","DOI":"10.1109\/SC41406.2024.00054"},{"key":"e_1_3_2_24_2","doi-asserted-by":"publisher","DOI":"10.5555\/829576"},{"key":"e_1_3_2_25_2","doi-asserted-by":"publisher","DOI":"10.1137\/1.9781611970739"},{"key":"e_1_3_2_26_2","doi-asserted-by":"publisher","DOI":"10.1145\/3710848.3710858"},{"key":"e_1_3_2_27_2","doi-asserted-by":"publisher","DOI":"10.1145\/2688500.2688517"},{"key":"e_1_3_2_28_2","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2010.38"},{"key":"e_1_3_2_29_2","doi-asserted-by":"publisher","DOI":"10.1145\/3313828"},{"key":"e_1_3_2_30_2","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2021.3085578"},{"key":"e_1_3_2_31_2","doi-asserted-by":"crossref","unstructured":"Chuanfu Xu Haozhong Qiu Liang Deng Jian Zhang Xiang Gao Jianbin Fang Qingsong Wang Yue Ding Yue Wang Zhimeng Han et\u00a0al. 2026. Efficient and scalable hybrid parallelization of unstructured computational fluid dynamics with geometric multigrid. ACM Transactions on Architecture and Code Optimization 23 1 (2026) 1\u201324.","DOI":"10.1145\/3776752"},{"key":"e_1_3_2_32_2","doi-asserted-by":"publisher","DOI":"10.1145\/3572848.3577506"},{"key":"e_1_3_2_33_2","doi-asserted-by":"publisher","DOI":"10.1145\/3524059.3532369"},{"key":"e_1_3_2_34_2","doi-asserted-by":"publisher","DOI":"10.1145\/3219819.3219890"},{"key":"e_1_3_2_35_2","doi-asserted-by":"publisher","DOI":"10.1145\/3710848.3710888"}],"container-title":["ACM Transactions on Architecture and Code Optimization"],"original-title":[],"language":"en","link":[{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/3803422","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2026,6,26]],"date-time":"2026-06-26T12:56:05Z","timestamp":1782478565000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3803422"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,6,26]]},"references-count":34,"journal-issue":{"issue":"2","published-print":{"date-parts":[[2026,6,30]]}},"alternative-id":["10.1145\/3803422"],"URL":"https:\/\/doi.org\/10.1145\/3803422","relation":{},"ISSN":["1544-3566","1544-3973"],"issn-type":[{"value":"1544-3566","type":"print"},{"value":"1544-3973","type":"electronic"}],"subject":[],"published":{"date-parts":[[2026,6,26]]},"assertion":[{"value":"2025-11-01","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2026-03-02","order":2,"name":"accepted","label":"Accepted","group":{"name":"publication_history","label":"Publication History"}},{"value":"2026-06-26","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}