{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,16]],"date-time":"2026-07-16T06:14:08Z","timestamp":1784182448763,"version":"3.55.0"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2026,8,4]],"date-time":"2026-08-04T00:00:00Z","timestamp":1785801600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/creativecommons.org\/licenses\/by\/4.0\/legalcode"}],"funder":[{"DOI":"10.13039\/501100000780","name":"European Commission","doi-asserted-by":"publisher","award":["101160314"],"award-info":[{"award-number":["101160314"]}],"id":[{"id":"10.13039\/501100000780","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100014013","name":"UK Research and Innovation","doi-asserted-by":"publisher","award":["10116095"],"award-info":[{"award-number":["10116095"]}],"id":[{"id":"10.13039\/100014013","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2026,8,4]]},"DOI":"10.1145\/3822454.3822495","type":"proceedings-article","created":{"date-parts":[[2026,7,16]],"date-time":"2026-07-16T05:57:39Z","timestamp":1784181459000},"page":"31-38","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":0,"title":["Cross-Layer Analysis of Permanent Faults in Asynchronous NoCs for Neuromorphic Computing"],"prefix":"10.1145","author":[{"ORCID":"https:\/\/orcid.org\/0009-0005-2017-3405","authenticated-orcid":false,"given":"Giuseppe","family":"Chessa","sequence":"first","affiliation":[{"name":"University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3591-8850","authenticated-orcid":false,"given":"Yuyi","family":"Yang","sequence":"additional","affiliation":[{"name":"University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-3856-0145","authenticated-orcid":false,"given":"Edward","family":"Jones","sequence":"additional","affiliation":[{"name":"University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7374-2871","authenticated-orcid":false,"given":"Michele","family":"Favalli","sequence":"additional","affiliation":[{"name":"Universit\u00e1 degli studi di Ferrara, Ferrara, Italy"}],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-7462-4551","authenticated-orcid":false,"given":"Davide","family":"Bertozzi","sequence":"additional","affiliation":[{"name":"University of Manchester, Manchester, United Kingdom"}],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"320","published-online":{"date-parts":[[2026,8,4]]},"reference":[{"key":"e_1_3_3_1_2_2","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-031-83089-1_6"},{"key":"e_1_3_3_1_3_2","doi-asserted-by":"publisher","unstructured":"F. Akopyan et\u00a0al. 2015. TrueNorth: Design and Tool Flow of a 65 mW 1 Million Neuron Programmable Neurosynaptic Chip. IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems 34 10 (2015) 1537\u20131557. 10.1109\/TCAD.2015.2474396","DOI":"10.1109\/TCAD.2015.2474396"},{"key":"e_1_3_3_1_4_2","doi-asserted-by":"publisher","unstructured":"Davide Bertozzi Gabriele Miorandi Alberto Ghiribaldi Wayne Burleson Greg Sadowski Kshitij Bhardwaj Weiwei Jiang and Steven\u00a0M. Nowick. 2021. Cost-Effective and Flexible Asynchronous Interconnect Technology for GALS Systems. IEEE Micro 41 1 (2021) 69\u201381. 10.1109\/MM.2020.3002790","DOI":"10.1109\/MM.2020.3002790"},{"key":"e_1_3_3_1_5_2","doi-asserted-by":"publisher","unstructured":"Benjamin Cramer Yannik Stradmann Johannes Schemmel and Friedemann Zenke. 2022. The Heidelberg Spiking Data Sets for the Systematic Evaluation of Spiking Neural Networks. IEEE Transactions on Neural Networks and Learning Systems 33 7 (2022) 2744\u20132757. 10.1109\/TNNLS.2020.3044364","DOI":"10.1109\/TNNLS.2020.3044364"},{"key":"e_1_3_3_1_6_2","doi-asserted-by":"publisher","unstructured":"Mike Davies\u00a0et al.2018. Loihi: A Neuromorphic Manycore Processor with On-Chip Learning. IEEE Micro 38 1 (2018) 82\u201399. 10.1109\/MM.2018.112130359","DOI":"10.1109\/MM.2018.112130359"},{"key":"e_1_3_3_1_7_2","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC65240.2025.00027"},{"key":"e_1_3_3_1_8_2","doi-asserted-by":"publisher","unstructured":"Jason\u00a0K. Eshraghian Max Ward Emre\u00a0O. Neftci Xinxin Wang Gregor Lenz Girish Dwivedi Mohammed Bennamoun Doo\u00a0Seok Jeong and Wei\u00a0D. Lu. 2023. Training Spiking Neural Networks Using Lessons From Deep Learning. Proc. IEEE 111 9 (2023) 1016\u20131054. 10.1109\/JPROC.2023.3308088","DOI":"10.1109\/JPROC.2023.3308088"},{"key":"e_1_3_3_1_9_2","doi-asserted-by":"crossref","unstructured":"Charlotte Frenkel David Bol and G. Indiveri. 2021. Bottom-Up and Top-Down Approaches for the Design of Neuromorphic Processing Systems: Tradeoffs and Synergies Between Natural and Artificial Intelligence. Proc. IEEE 111 (2021) 623\u2013652. https:\/\/api.semanticscholar.org\/CorpusID:258685271","DOI":"10.1109\/JPROC.2023.3273520"},{"key":"e_1_3_3_1_10_2","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC42614.2022.9731734"},{"key":"e_1_3_3_1_11_2","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS60994.2024.10616060"},{"key":"e_1_3_3_1_12_2","doi-asserted-by":"publisher","unstructured":"Henrik Hulgaard Steven\u00a0M. Burns and Gaetano Borriello. 1995. Testing asynchronous circuits: A survey. Integration 19 3 (1995) 111\u2013131. 10.1016\/0167-9260(95)00012-5","DOI":"10.1016\/0167-9260(95)00012-5"},{"key":"e_1_3_3_1_13_2","doi-asserted-by":"publisher","unstructured":"Phu\u00a0Khanh Huynh Ilknur Mustafazade Francky Catthoor Nagarajan Kandasamy and Anup Das. 2024. A Scalable Dynamic Segmented Bus Interconnect for Neuromorphic Architectures. IEEE Embedded Systems Letters 16 4 (2024) 505\u2013508. 10.1109\/LES.2024.3452551","DOI":"10.1109\/LES.2024.3452551"},{"key":"e_1_3_3_1_14_2","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2011.15"},{"key":"e_1_3_3_1_15_2","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2004.1311875"},{"key":"e_1_3_3_1_16_2","unstructured":"Filippo Marostica Alessio Carpegna Alessandro Savino and Stefano\u00a0Di Carlo. 2025. Energy-Efficient Digital Design: A Comparative Study of Event-Driven and Clock-Driven Spiking Neurons. arxiv:https:\/\/arXiv.org\/abs\/2506.13268\u00a0[cs.NE] https:\/\/arxiv.org\/abs\/2506.13268"},{"key":"e_1_3_3_1_17_2","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2015.24"},{"key":"e_1_3_3_1_18_2","doi-asserted-by":"publisher","unstructured":"Saber Moradi Ning Qiao Fabio Stefanini and Giacomo Indiveri. 2018. A Scalable Multicore Architecture With Heterogeneous Memory Structures for Dynamic Neuromorphic Asynchronous Processors (DYNAPs). IEEE Transactions on Biomedical Circuits and Systems 12 1 (2018) 106\u2013122. 10.1109\/TBCAS.2017.2759700","DOI":"10.1109\/TBCAS.2017.2759700"},{"key":"e_1_3_3_1_19_2","doi-asserted-by":"publisher","unstructured":"Steven\u00a0M. Nowick and Montek Singh. 2015. Asynchronous Design\u2014Part 1: Overview and Recent Advances. IEEE Design & Test 32 3 (2015) 5\u201318. 10.1109\/MDAT.2015.2413759","DOI":"10.1109\/MDAT.2015.2413759"},{"key":"e_1_3_3_1_20_2","doi-asserted-by":"publisher","unstructured":"E. Painkras et\u00a0al. 2013. SpiNNaker: A 1-W 18-Core System-on-Chip for Massively-Parallel Neural Network Simulation. IEEE Journal of Solid-State Circuits 48 8 (2013) 1943\u20131953. 10.1109\/JSSC.2013.2259038","DOI":"10.1109\/JSSC.2013.2259038"},{"key":"e_1_3_3_1_21_2","doi-asserted-by":"publisher","unstructured":"Jens\u00a0E. Pedersen et\u00a0al. 2024. Neuromorphic intermediate representation: A unified instruction set for interoperable brain-inspired computing. Nature Communications 15 1 (Dec. 2024). 10.1038\/s41467-024-52259-9","DOI":"10.1038\/s41467-024-52259-9"},{"key":"e_1_3_3_1_22_2","doi-asserted-by":"publisher","DOI":"10.1145\/3489517.3530657"},{"key":"e_1_3_3_1_23_2","doi-asserted-by":"publisher","unstructured":"Rachmad Vidya\u00a0Wicaksana Putra Muhammad\u00a0Abdullah Hanif and Muhammad Shafique. 2023. RescueSNN: enabling reliable executions on spiking neural network accelerators under permanent faults. Frontiers in Neuroscience Volume 17 - 2023 (2023). 10.3389\/fnins.2023.1159440","DOI":"10.3389\/fnins.2023.1159440"},{"key":"e_1_3_3_1_24_2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1996.556963"},{"key":"e_1_3_3_1_25_2","doi-asserted-by":"publisher","DOI":"10.1109\/IJCNN48605.2020.9207560"},{"key":"e_1_3_3_1_26_2","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2005.1584067"},{"key":"e_1_3_3_1_27_2","doi-asserted-by":"publisher","unstructured":"Montek Singh and Steven\u00a0M. Nowick. 2007. MOUSETRAP: High-Speed Transition-Signaling Asynchronous Pipelines. IEEE Transactions on Very Large Scale Integration (VLSI) Systems 15 6 (2007) 684\u2013698. 10.1109\/TVLSI.2007.898732","DOI":"10.1109\/TVLSI.2007.898732"},{"key":"e_1_3_3_1_28_2","doi-asserted-by":"publisher","DOI":"10.23919\/DATE54114.2022.9774711"},{"key":"e_1_3_3_1_29_2","unstructured":"Theofilos Spyrou Said Hamdioui and Haralampos-G. Stratigopoulos. 2024. SpikeFI: A Fault Injection Framework for Spiking Neural Networks. arxiv:https:\/\/arXiv.org\/abs\/2412.06795\u00a0[cs.NE] https:\/\/arxiv.org\/abs\/2412.06795"},{"key":"e_1_3_3_1_30_2","doi-asserted-by":"publisher","DOI":"10.1109\/DFT59622.2023.10313541"},{"key":"e_1_3_3_1_31_2","doi-asserted-by":"publisher","unstructured":"Zhe Su Simone Ramini Demetra Coffen\u00a0Marcolin Alessandro Veronesi Milos Krstic Giacomo Indiveri Davide Bertozzi and Steven\u00a0M. Nowick. 2024. An Ultra-Low Cost and Multicast-Enabled Asynchronous NoC for Neuromorphic Edge Computing. IEEE Journal on Emerging and Selected Topics in Circuits and Systems 14 3 (2024) 409\u2013424. 10.1109\/JETCAS.2024.3433427","DOI":"10.1109\/JETCAS.2024.3433427"},{"key":"e_1_3_3_1_32_2","doi-asserted-by":"publisher","unstructured":"Zhuo Wu Zan Wang Junjie Chen Hanmo You Ming Yan and Lanjun Wang. 2024. Stratified random sampling for neural network test input selection. Information and Software Technology 165 (2024) 107331. 10.1016\/j.infsof.2023.107331","DOI":"10.1016\/j.infsof.2023.107331"}],"event":{"name":"ICONS '26: International Conference on Neuromorphic Systems","location":"Chicago USA","acronym":"ICONS 2026","sponsor":["SIGDA ACM Special Interest Group on Design Automation","SIGAI ACM Special Interest Group on Artificial Intelligence"]},"container-title":["Proceedings of the International Conference on Neuromorphic Systems"],"original-title":[],"deposited":{"date-parts":[[2026,7,16]],"date-time":"2026-07-16T05:59:22Z","timestamp":1784181562000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/3822454.3822495"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2026,8,4]]},"references-count":31,"alternative-id":["10.1145\/3822454.3822495","10.1145\/3822454"],"URL":"https:\/\/doi.org\/10.1145\/3822454.3822495","relation":{},"subject":[],"published":{"date-parts":[[2026,8,4]]},"assertion":[{"value":"2026-08-04","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}