{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:28:06Z","timestamp":1750307286451,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":8,"publisher":"ACM","license":[{"start":{"date-parts":[[2011,5,11]],"date-time":"2011-05-11T00:00:00Z","timestamp":1305072000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2011,5,11]]},"DOI":"10.1145\/1978582.1978605","type":"proceedings-article","created":{"date-parts":[[2011,5,17]],"date-time":"2011-05-17T12:59:14Z","timestamp":1305637154000},"page":"107-108","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":2,"title":["Using partial dynamic FPGA reconfiguration to support real-time dependability"],"prefix":"10.1145","author":[{"given":"Jos\u00e9 Lu\u00eds","family":"Nunes","sequence":"first","affiliation":[{"name":"Polytechnic Institute of Coimbra\/CISUC -- ISEC\/DEIS, Coimbra, Portugal"}]},{"given":"Jo\u00e3o Carlos","family":"Cunha","sequence":"additional","affiliation":[{"name":"Polytechnic Institute of Coimbra\/CISUC -- ISEC\/DEIS, Coimbra, Portugal"}]},{"given":"Raul","family":"Barbosa","sequence":"additional","affiliation":[{"name":"University of Coimbra\/CISUC -- DEI, Coimbra, Portugal"}]},{"given":"M\u00e1rio","family":"Zenha-Rela","sequence":"additional","affiliation":[{"name":"University of Coimbra\/CISUC -- DEI, Coimbra, Portugal"}]}],"member":"320","published-online":{"date-parts":[[2011,5,11]]},"reference":[{"volume-title":"Dynamic Reconfigurability in Embedded System Design. IEEE International Symposium on Circuits and Systems","year":"2007","author":"Rana V.","key":"e_1_3_2_1_1_1"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/1228784.1228803"},{"key":"e_1_3_2_1_3_1","volume-title":"Soft Error Susceptibility Analysis of SRAM-Based FPGAs in High-Performance Information Systems. In IEEE Transactions on Nuclear Science (Dec.","volume":"54","author":"Asadi H.","year":"2007"},{"volume-title":"International Symposium on Defect and Fault-Tolerance in VLSI Systems","year":"2007","author":"Bolchini C.","key":"e_1_3_2_1_4_1"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.69"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-45234-8_55"},{"key":"e_1_3_2_1_7_1","doi-asserted-by":"publisher","DOI":"10.1007\/11549703_6"},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1142155.1142167"}],"event":{"name":"EWDC '11: 13th European Workshop on Dependable Computing","acronym":"EWDC '11","location":"Pisa Italy"},"container-title":["Proceedings of the 13th European Workshop on Dependable Computing"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1978582.1978605","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/1978582.1978605","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T10:59:37Z","timestamp":1750244377000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/1978582.1978605"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5,11]]},"references-count":8,"alternative-id":["10.1145\/1978582.1978605","10.1145\/1978582"],"URL":"https:\/\/doi.org\/10.1145\/1978582.1978605","relation":{},"subject":[],"published":{"date-parts":[[2011,5,11]]},"assertion":[{"value":"2011-05-11","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}