{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:19:18Z","timestamp":1750306758185,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":31,"publisher":"ACM","license":[{"start":{"date-parts":[[2013,10,16]],"date-time":"2013-10-16T00:00:00Z","timestamp":1381881600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"funder":[{"DOI":"10.13039\/501100004895","name":"European Social Fund","doi-asserted-by":"publisher","award":["SFRH\/BD\/70701\/2010"],"award-info":[{"award-number":["SFRH\/BD\/70701\/2010"]}],"id":[{"id":"10.13039\/501100004895","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001871","name":"Funda\u00e7\u00e3o para a Ci\u00eancia e a Tecnologia","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100001871","id-type":"DOI","asserted-by":"publisher"}]},{"name":"EU ARTEMIS JU","award":["ARTEMIS\/0003\/2012, 333053 (CONCERTO)"],"award-info":[{"award-number":["ARTEMIS\/0003\/2012, 333053 (CONCERTO)"]}]},{"name":"ERDF (European Regional Development Fund)","award":["FCOMP-01-0124-FEDER-015050"],"award-info":[{"award-number":["FCOMP-01-0124-FEDER-015050"]}]}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2013,10,16]]},"DOI":"10.1145\/2516821.2516837","type":"proceedings-article","created":{"date-parts":[[2013,10,3]],"date-time":"2013-10-03T13:37:34Z","timestamp":1380807454000},"page":"129-138","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":5,"title":["Optimal procrastination interval for constrained deadline sporadic tasks upon uniprocessors"],"prefix":"10.1145","author":[{"given":"Muhammad Ali","family":"Awan","sequence":"first","affiliation":[{"name":"Polytechnic Institute of Porto, Portugal"}]},{"given":"Patrick Meumeu","family":"Yomsi","sequence":"additional","affiliation":[{"name":"Polytechnic Institute of Porto, Portugal"}]},{"given":"Stefan M.","family":"Petters","sequence":"additional","affiliation":[{"name":"Polytechnic Institute of Porto, Portugal"}]}],"member":"320","published-online":{"date-parts":[[2013,10,16]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1109\/ECRTS.2011.17"},{"key":"e_1_3_2_1_2_1","volume-title":"CISTER-TR-130608","author":"Awan M. A.","year":"2013","unstructured":"M. A. Awan , P. M. Yomsi , and S. M. Petters . Optimal procrastination interval upon uniprocessors , CISTER-TR-130608 , 2013 . https:\/\/www.cister.isep.ipp.pt\/people\/Muhammad%2BAli%2BAwan\/publications\/. M. A. Awan, P. M. Yomsi, and S. M. Petters. Optimal procrastination interval upon uniprocessors, CISTER-TR-130608, 2013. https:\/\/www.cister.isep.ipp.pt\/people\/Muhammad%2BAli%2BAwan\/publications\/."},{"key":"e_1_3_2_1_3_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-006-9004-z"},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2007.70787"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.5555\/1109557.1109598"},{"key":"e_1_3_2_1_6_1","doi-asserted-by":"publisher","DOI":"10.1007\/BF01995675"},{"key":"e_1_3_2_1_7_1","volume-title":"Proceedings of the 4th Multidisciplinary International Scheduling Conference","author":"Bini E.","year":"2009","unstructured":"E. Bini . Modeling preemptive edf and fp by integer variables . In Proceedings of the 4th Multidisciplinary International Scheduling Conference , Dublin, Ireland , August 2009 . E. Bini. Modeling preemptive edf and fp by integer variables. In Proceedings of the 4th Multidisciplinary International Scheduling Conference, Dublin, Ireland, August 2009."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/1159974.1134673"},{"key":"e_1_3_2_1_9_1","first-page":"24","volume-title":"Proceedings of the 2005 Workshop on Power Aware Real-time Computing","author":"Cheng H.","year":"2005","unstructured":"H. Cheng and S. Goddard . Integrated device scheduling and processor voltage scaling for system-wide energy conservation . In Proceedings of the 2005 Workshop on Power Aware Real-time Computing , pages 24 -- 29 , Sept. 2005 . H. Cheng and S. Goddard. Integrated device scheduling and processor voltage scaling for system-wide energy conservation. In Proceedings of the 2005 Workshop on Power Aware Real-time Computing, pages 24--29, Sept. 2005."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.1989.559777"},{"key":"e_1_3_2_1_11_1","volume-title":"Results on the slack of a periodic task set. Technical report, ri 2008_5","author":"Chetto M.","year":"2008","unstructured":"M. Chetto . Results on the slack of a periodic task set. Technical report, ri 2008_5 , Institut de Recherche en Communications et en Cybern\u00e9tique de Nantes , june 2008 . M. Chetto. Results on the slack of a periodic task set. Technical report, ri 2008_5, Institut de Recherche en Communications et en Cybern\u00e9tique de Nantes, june 2008."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1145\/1450058.1450073"},{"key":"e_1_3_2_1_13_1","first-page":"604","volume-title":"Journal of Aerospace Computing, Information, and Communication","author":"George L.","year":"2009","unstructured":"L. George and J.-F. Hermant . Characterization of the space of feasible worst-case execution times for earliest-deadline-first scheduling . In Journal of Aerospace Computing, Information, and Communication , volume 6: 11 , pages 604 -- 623 , 2009 . L. George and J.-F. Hermant. Characterization of the space of feasible worst-case execution times for earliest-deadline-first scheduling. In Journal of Aerospace Computing, Information, and Communication, volume 6:11, pages 604--623, 2009."},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.1109\/RTSS.2009.25"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-011-9115-z"},{"key":"e_1_3_2_1_16_1","doi-asserted-by":"publisher","DOI":"10.1145\/1290672.1290678"},{"key":"e_1_3_2_1_17_1","volume-title":"2010 update, overview","author":"RS.","year":"2010","unstructured":"IT RS. International technology roadmap for semiconductors , 2010 update, overview , 2010 . ITRS. International technology roadmap for semiconductors, 2010 update, overview, 2010."},{"key":"e_1_3_2_1_18_1","doi-asserted-by":"publisher","DOI":"10.1145\/997163.997173"},{"key":"e_1_3_2_1_19_1","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065612"},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1145\/996566.996650"},{"key":"e_1_3_2_1_21_1","volume-title":"Proceedings of the 15th Euromicro Conference on Real-Time Systems","author":"Lee Y.-H.","year":"2003","unstructured":"Y.-H. Lee , K. Reddy , and C. Krishna . Scheduling techniques for reducing leakage power in hard real-time systems . In Proceedings of the 15th Euromicro Conference on Real-Time Systems , Jul. 2003 . Y.-H. Lee, K. Reddy, and C. Krishna. Scheduling techniques for reducing leakage power in hard real-time systems. In Proceedings of the 15th Euromicro Conference on Real-Time Systems, Jul. 2003."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/321738.321743"},{"key":"e_1_3_2_1_23_1","doi-asserted-by":"publisher","DOI":"10.1109\/TrustCom.2011.137"},{"key":"e_1_3_2_1_24_1","volume-title":"SPARTS: Simulator for power aware and real-time systems","author":"Nikolic B.","year":"2011","unstructured":"B. Nikolic , M. A. Awan , and S. M. Petters . SPARTS: Simulator for power aware and real-time systems , 2011 . http:\/\/www.cister.isep.ipp.pt\/projects\/sparts\/. B. Nikolic, M. A. Awan, and S. M. Petters. SPARTS: Simulator for power aware and real-time systems, 2011. http:\/\/www.cister.isep.ipp.pt\/projects\/sparts\/."},{"key":"e_1_3_2_1_25_1","doi-asserted-by":"publisher","DOI":"10.1145\/1023833.1023854"},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1007\/s11241-005-0506-x"},{"key":"e_1_3_2_1_27_1","first-page":"2011","article-title":"MPC8536EEC","volume":"5","author":"Semiconductor F.","unstructured":"F. Semiconductor . MPC8536 E PowerQUICC III Integrated Processor Hardware Specifications . Number : MPC8536EEC , Rev. 5 , 09\/ 2011 . F. Semiconductor. MPC8536E PowerQUICC III Integrated Processor Hardware Specifications. Number: MPC8536EEC,Rev. 5, 09\/2011.","journal-title":"Rev."},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1023\/A:1008093629946"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2000.858698"},{"key":"e_1_3_2_1_30_1","doi-asserted-by":"publisher","DOI":"10.1145\/1176887.1176894"},{"key":"e_1_3_2_1_31_1","doi-asserted-by":"publisher","DOI":"10.1109\/RTCSA.2010.12"}],"event":{"name":"RTNS 2013: 21st International Conference on Real-Time Networks and Systems","sponsor":["CNRS Centre National De La Rechercue Scientifique","INRIA Institut Natl de Recherche en Info et en Automatique"],"location":"Sophia Antipolis France","acronym":"RTNS 2013"},"container-title":["Proceedings of the 21st International conference on Real-Time Networks and Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2516821.2516837","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2516821.2516837","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T07:28:39Z","timestamp":1750231719000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2516821.2516837"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10,16]]},"references-count":31,"alternative-id":["10.1145\/2516821.2516837","10.1145\/2516821"],"URL":"https:\/\/doi.org\/10.1145\/2516821.2516837","relation":{},"subject":[],"published":{"date-parts":[[2013,10,16]]},"assertion":[{"value":"2013-10-16","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}