{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,19]],"date-time":"2025-06-19T04:12:12Z","timestamp":1750306332014,"version":"3.41.0"},"publisher-location":"New York, NY, USA","reference-count":32,"publisher":"ACM","license":[{"start":{"date-parts":[[2016,4,18]],"date-time":"2016-04-18T00:00:00Z","timestamp":1460937600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/www.acm.org\/publications\/policies\/copyright_policy#Background"}],"content-domain":{"domain":["dl.acm.org"],"crossmark-restriction":true},"short-container-title":[],"published-print":{"date-parts":[[2016,4,18]]},"DOI":"10.1145\/2901318.2901346","type":"proceedings-article","created":{"date-parts":[[2016,4,12]],"date-time":"2016-04-12T12:23:12Z","timestamp":1460463792000},"page":"1-15","update-policy":"https:\/\/doi.org\/10.1145\/crossmark-policy","source":"Crossref","is-referenced-by-count":11,"title":["Hardware read-write lock elision"],"prefix":"10.1145","author":[{"given":"Pascal","family":"Felber","sequence":"first","affiliation":[{"name":"University of Neuch\u00e2tel"}]},{"given":"Shady","family":"Issa","sequence":"additional","affiliation":[{"name":"University of Lisbon"}]},{"given":"Alexander","family":"Matveev","sequence":"additional","affiliation":[{"name":"MIT"}]},{"given":"Paolo","family":"Romano","sequence":"additional","affiliation":[{"name":"University of Lisbon"}]}],"member":"320","published-online":{"date-parts":[[2016,4,18]]},"reference":[{"key":"e_1_3_2_1_1_1","doi-asserted-by":"publisher","DOI":"10.1145\/1229428.1229484"},{"key":"e_1_3_2_1_2_1","doi-asserted-by":"publisher","DOI":"10.1145\/2611462.2611482"},{"key":"e_1_3_2_1_3_1","volume-title":"6th Workshop on the Theory of Transactional Memory EuroTM WTTM","author":"Afek Y.","year":"2014","unstructured":"Afek , Y. , Matveev , A. , and Shavit , N . Reduced hardware lock elision . 6th Workshop on the Theory of Transactional Memory EuroTM WTTM 2014 . Afek, Y., Matveev, A., and Shavit, N. Reduced hardware lock elision. 6th Workshop on the Theory of Transactional Memory EuroTM WTTM 2014."},{"key":"e_1_3_2_1_4_1","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-33651-5_21"},{"key":"e_1_3_2_1_5_1","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485942"},{"key":"e_1_3_2_1_6_1","volume-title":"9th ACM SIGPLAN Wkshp. on Transactional Computing","author":"Calciu I.","year":"2014","unstructured":"Calciu , I. , Shpeisman , T. , Pokam , G. , and Herlihy , M . Improved single global lock fallback for best-effort hardware transactional memory . 9th ACM SIGPLAN Wkshp. on Transactional Computing ( 2014 ). Calciu, I., Shpeisman, T., Pokam, G., and Herlihy, M. Improved single global lock fallback for best-effort hardware transactional memory. 9th ACM SIGPLAN Wkshp. on Transactional Computing (2014)."},{"key":"e_1_3_2_1_7_1","volume-title":"Hardware extensions to make lazy subscription safe. CoRR abs\/1407.6968","author":"Dice D.","year":"2014","unstructured":"Dice , D. , Harris , T. L. , Kogan , A. , Lev , Y. , and Moir , M . Hardware extensions to make lazy subscription safe. CoRR abs\/1407.6968 ( 2014 ). Dice, D., Harris, T. L., Kogan, A., Lev, Y., and Moir, M. Hardware extensions to make lazy subscription safe. CoRR abs\/1407.6968 (2014)."},{"key":"e_1_3_2_1_8_1","doi-asserted-by":"publisher","DOI":"10.1145\/2612669.2612696"},{"key":"e_1_3_2_1_9_1","first-page":"209","volume-title":"11th International Conference on Autonomic Computing, ICAC '14","author":"Diegues N.","year":"2014","unstructured":"Diegues , N. , and Romano , P . Self-tuning intel transactional synchronization extensions . In 11th International Conference on Autonomic Computing, ICAC '14 , Philadelphia, PA, USA , June 18-20, 2014 . (2014), X. Zhu, G. Casale, and X. Gu, Eds., USENIX Association, pp. 209 -- 219 . Diegues, N., and Romano, P. Self-tuning intel transactional synchronization extensions. In 11th International Conference on Autonomic Computing, ICAC '14, Philadelphia, PA, USA, June 18-20, 2014. (2014), X. Zhu, G. Casale, and X. Gu, Eds., USENIX Association, pp. 209--219."},{"key":"e_1_3_2_1_10_1","doi-asserted-by":"publisher","DOI":"10.1145\/2628071.2628080"},{"key":"e_1_3_2_1_11_1","volume-title":"Kyoto cabinet: A straightforward implementation of DBM","author":"Labs","year":"2011","unstructured":"FAL Labs . Kyoto cabinet: A straightforward implementation of DBM , 2011 . http:\/\/fallabs.com\/kyotocabinet\/. FAL Labs. Kyoto cabinet: A straightforward implementation of DBM, 2011. http:\/\/fallabs.com\/kyotocabinet\/."},{"key":"e_1_3_2_1_12_1","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2015.8"},{"key":"e_1_3_2_1_13_1","doi-asserted-by":"publisher","DOI":"10.1145\/1272996.1273029"},{"key":"e_1_3_2_1_14_1","doi-asserted-by":"publisher","DOI":"10.5555\/645958.676105"},{"key":"e_1_3_2_1_15_1","doi-asserted-by":"publisher","DOI":"10.1016\/j.jpdc.2007.04.010"},{"key":"e_1_3_2_1_16_1","unstructured":"IBM. Power ISA transactional memory Dec. 2012. Version 2.07.  IBM. Power ISA transactional memory Dec. 2012. Version 2.07."},{"key":"e_1_3_2_1_17_1","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2012.12"},{"key":"e_1_3_2_1_18_1","volume-title":"Reentrant Read Write Lock. https:\/\/docs.oracle.com\/javase\/7\/docs\/api\/java\/util\/concurrent\/locks\/ReentrantReadWriteLock.html","author":"JavaDocs","year":"2016","unstructured":"JavaDocs . Reentrant Read Write Lock. https:\/\/docs.oracle.com\/javase\/7\/docs\/api\/java\/util\/concurrent\/locks\/ReentrantReadWriteLock.html , 2016 . JavaDocs. Reentrant Read Write Lock. https:\/\/docs.oracle.com\/javase\/7\/docs\/api\/java\/util\/concurrent\/locks\/ReentrantReadWriteLock.html, 2016."},{"key":"e_1_3_2_1_19_1","unstructured":"Jonathan Corbet. Big reader locks. http:\/\/lwn.net\/Articles\/378911\/ 2010.  Jonathan Corbet. Big reader locks. http:\/\/lwn.net\/Articles\/378911\/ 2010."},{"key":"e_1_3_2_1_20_1","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2014.2380199"},{"key":"e_1_3_2_1_21_1","first-page":"219","volume-title":"2014 USENIX Annual Technical Conference (USENIX ATC 14)","author":"Liu R.","year":"2014","unstructured":"Liu , R. , Zhang , H. , and Chen , H . Scalable read-mostly synchronization using passive reader-writer locks . In 2014 USENIX Annual Technical Conference (USENIX ATC 14) (Philadelphia, PA, June 2014 ), USENIX Association , pp. 219 -- 230 . Liu, R., Zhang, H., and Chen, H. Scalable read-mostly synchronization using passive reader-writer locks. In 2014 USENIX Annual Technical Conference (USENIX ATC 14) (Philadelphia, PA, June 2014), USENIX Association, pp. 219--230."},{"key":"e_1_3_2_1_22_1","doi-asserted-by":"publisher","DOI":"10.1145\/2815400.2815406"},{"key":"e_1_3_2_1_23_1","first-page":"136","volume":"2005","author":"McKenney P. E.","year":"2005","unstructured":"McKenney , P. E. Memory ordering in modern microprocessors, part i. Linux Journal 2005 , 136 ( 2005 ), 2. McKenney, P. E. Memory ordering in modern microprocessors, part i. Linux Journal 2005, 136 (2005), 2.","journal-title":"Linux Journal"},{"key":"e_1_3_2_1_24_1","first-page":"509","volume-title":"Parallel and Distributed Computing and Systems (Oct.","author":"McKenney P. E.","year":"1998","unstructured":"McKenney , P. E. , and Slingwine , J. D . Read-copy-update: Using execution history to solve concurrency problems . In Parallel and Distributed Computing and Systems (Oct. 1998 ), pp. 509 -- 518 . McKenney, P. E., and Slingwine, J. D. Read-copy-update: Using execution history to solve concurrency problems. In Parallel and Distributed Computing and Systems (Oct. 1998), pp. 509--518."},{"key":"e_1_3_2_1_25_1","first-page":"509","volume-title":"NV","author":"Mckenney P. E.","year":"1998","unstructured":"Mckenney , P. E. , and Slingwine , J. D . Read-Copy Update: Using Execution History to Solve Concurrency Problems. In Parallel and Distributed Computing and Systems (Las Vegas , NV , Oct. 1998 ), pp. 509 -- 518 . Mckenney, P. E., and Slingwine, J. D. Read-Copy Update: Using Execution History to Solve Concurrency Problems. In Parallel and Distributed Computing and Systems (Las Vegas, NV, Oct. 1998), pp. 509--518."},{"key":"e_1_3_2_1_26_1","doi-asserted-by":"publisher","DOI":"10.1145\/2749469.2750403"},{"key":"e_1_3_2_1_27_1","doi-asserted-by":"publisher","DOI":"10.5555\/563998.564036"},{"key":"e_1_3_2_1_28_1","doi-asserted-by":"publisher","DOI":"10.1145\/1519065.1519094"},{"key":"e_1_3_2_1_29_1","doi-asserted-by":"crossref","unstructured":"Spear M. Ruan W. Liu Y. and \n      Vyas T\n  . \n  Case study: Using transactions in memcached\n  . In Transactional Memory. Foundations Algorithms Tools and Applications R. Guerraoui and P. Romano Eds. vol. \n  8913\n   of \n  Lecture Notes in Computer Science\n  . \n  Springer International Publishing 2015 pp. \n  449\n  --\n  467\n  .  Spear M. Ruan W. Liu Y. and Vyas T. Case study: Using transactions in memcached. In Transactional Memory. Foundations Algorithms Tools and Applications R. Guerraoui and P. Romano Eds. vol. 8913 of Lecture Notes in Computer Science . Springer International Publishing 2015 pp. 449--467.","DOI":"10.1007\/978-3-319-14720-8_20"},{"key":"e_1_3_2_1_31_1","volume-title":"http:\/\/www.tpc.org\/tpcc","author":"TPC Council","year":"2011","unstructured":"TPC Council . TPC-C Benchmark . http:\/\/www.tpc.org\/tpcc , 2011 . TPC Council. TPC-C Benchmark. http:\/\/www.tpc.org\/tpcc, 2011."},{"key":"e_1_3_2_1_32_1","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503232"},{"key":"e_1_3_2_1_33_1","doi-asserted-by":"publisher","DOI":"10.1145\/2503210.2503232"}],"event":{"name":"EuroSys '16: Eleventh EuroSys Conference 2016","acronym":"EuroSys '16","location":"London United Kingdom"},"container-title":["Proceedings of the Eleventh European Conference on Computer Systems"],"original-title":[],"link":[{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2901318.2901346","content-type":"unspecified","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/dl.acm.org\/doi\/pdf\/10.1145\/2901318.2901346","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,18]],"date-time":"2025-06-18T04:54:43Z","timestamp":1750222483000},"score":1,"resource":{"primary":{"URL":"https:\/\/dl.acm.org\/doi\/10.1145\/2901318.2901346"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,4,18]]},"references-count":32,"alternative-id":["10.1145\/2901318.2901346","10.1145\/2901318"],"URL":"https:\/\/doi.org\/10.1145\/2901318.2901346","relation":{},"subject":[],"published":{"date-parts":[[2016,4,18]]},"assertion":[{"value":"2016-04-18","order":2,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}