{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,21]],"date-time":"2026-02-21T18:25:47Z","timestamp":1771698347418,"version":"3.50.1"},"reference-count":34,"publisher":"IBM","issue":"2-3","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IBM J. Res. &amp; Dev."],"published-print":{"date-parts":[[2016,3]]},"DOI":"10.1147\/jrd.2016.2527418","type":"journal-article","created":{"date-parts":[[2016,3,28]],"date-time":"2016-03-28T18:23:36Z","timestamp":1459189416000},"page":"14:1-14:18","source":"Crossref","is-referenced-by-count":4,"title":["Workload acceleration with the IBM POWER vector-scalar architecture"],"prefix":"10.1147","volume":"60","author":[{"given":"M.","family":"Gschwind","sequence":"first","affiliation":[]}],"member":"3082","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2008.5222004"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2012.6169044"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2008.4751904"},{"key":"ref30","author":"eichenberger","year":"2010","journal-title":"Matrix multiplication operations using pair-wise load and splat operations"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2014.2380198"},{"key":"ref10","author":"gschwind","year":"2005","journal-title":"A Novel SIMD Architecture for the Cell Heterogeneous Chip-Multiprocessor"},{"key":"ref11","first-page":"1","article-title":"Exploiting the AltiVec unit for commercial applications","author":"citron","year":"0","journal-title":"Proc 9th Workshop Comput Archit Eval Commercial Workloads"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1147\/rd.516.0663"},{"key":"ref13","first-page":"1","article-title":"Hybrid computing systems","volume":"53","year":"2009","journal-title":"IBM J Res & Dev"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1155\/2009\/979236"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2009.5429067"},{"key":"ref16","year":"2008","journal-title":"The Top500 List"},{"key":"ref17","year":"2008","journal-title":"The Green500 list"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1062261.1062262"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.89"},{"key":"ref28","author":"gschwind","year":"2006","journal-title":"Method and apparatus for generating data parallel select operations in a pervasively data parallel System"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1994.331886"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CGO.2006.25"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1147\/rd.341.0023"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.45"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2007.192"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/rd.446.0885"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1147\/rd.494.0589"},{"key":"ref7","author":"gschwind","year":"2005","journal-title":"Implementing instruction set architectures with non-contiguous register file specifiers"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/40.848475"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.41"},{"key":"ref1","article-title":"IBM POWER7 technology and systems","volume":"55","year":"2011","journal-title":"IBM J Res & Dev"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1147\/JRD.2014.2376112"},{"key":"ref22","year":"2008"},{"key":"ref21","author":"gschwind","year":"2008","journal-title":"Multi-addressable register file"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/996841.996853"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.14778\/1453856.1453925"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1147\/sj.451.0059"},{"key":"ref25","first-page":"153","article-title":"Efficient SIMD code generation for runtime alignment and length conversion","author":"wu","year":"0","journal-title":"Proc IEEE Int Symp CGO"}],"container-title":["IBM Journal of Research and Development"],"original-title":[],"deposited":{"date-parts":[[2016,4,9]],"date-time":"2016-04-09T16:14:51Z","timestamp":1460218491000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/lpdocs\/epic03\/wrapper.htm?arnumber=7442604"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,3]]},"references-count":34,"journal-issue":{"issue":"2-3"},"URL":"https:\/\/doi.org\/10.1147\/jrd.2016.2527418","relation":{},"ISSN":["0018-8646","0018-8646"],"issn-type":[{"value":"0018-8646","type":"print"},{"value":"0018-8646","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,3]]}}}