{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,14]],"date-time":"2026-05-14T11:19:21Z","timestamp":1778757561916,"version":"3.51.4"},"reference-count":10,"publisher":"IBM","issue":"4\/5","content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IBM J. Res. & Dev."],"published-print":{"date-parts":[[2018,7,1]]},"DOI":"10.1147\/jrd.2018.2856978","type":"journal-article","created":{"date-parts":[[2018,7,19]],"date-time":"2018-07-19T14:53:40Z","timestamp":1532012020000},"page":"8:1-8:8","source":"Crossref","is-referenced-by-count":38,"title":["IBM POWER9 opens up a new era of acceleration enablement: OpenCAPI"],"prefix":"10.1147","volume":"62","author":[{"given":"J.","family":"Stuecheli","sequence":"first","affiliation":[]},{"given":"W. J.","family":"Starke","sequence":"additional","affiliation":[]},{"given":"J. D.","family":"Irish","sequence":"additional","affiliation":[]},{"given":"L. B.","family":"Arimilli","sequence":"additional","affiliation":[]},{"given":"D.","family":"Dreps","sequence":"additional","affiliation":[]},{"given":"B.","family":"Blaner","sequence":"additional","affiliation":[]},{"given":"C.","family":"Wollbrink","sequence":"additional","affiliation":[]},{"given":"B.","family":"Allison","sequence":"additional","affiliation":[]}],"member":"3082","reference":[{"key":"ref4","article-title":"Programming models for emerging nonvolatile memory technologies","volume":"38","author":"rudoff","year":"2013","journal-title":"LOGIN The USENIX Magazine"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"439","DOI":"10.1147\/rd.524.0439","article-title":"Storage-class memory: The next storage system technology","volume":"52","author":"freitas","year":"2008","journal-title":"IBM J Res Develop"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/3173162.3173195"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2716320"},{"key":"ref5","year":"0"},{"key":"ref8","article-title":"Innova-2 flex\n programmable network adapter","year":"2018"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/54.748803"},{"key":"ref2","doi-asserted-by":"crossref","first-page":"7:1?7:7","DOI":"10.1147\/JRD.2014.2380198","article-title":"CAPI: A coherent\n accelerator processor interface","volume":"59","author":"stuecheli","year":"2015","journal-title":"IBM J Res & Dev"},{"key":"ref9","article-title":"Accelerating\n persistent neural networks at datacenter scale","volume":"29","author":"chung","year":"2017","journal-title":"Hot Chips"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/2788396"}],"container-title":["IBM Journal of Research and Development"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5288520\/8458346\/08413085.pdf?arnumber=8413085","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T18:03:31Z","timestamp":1761588211000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8413085\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,7,1]]},"references-count":10,"journal-issue":{"issue":"4\/5"},"URL":"https:\/\/doi.org\/10.1147\/jrd.2018.2856978","relation":{},"ISSN":["0018-8646","0018-8646"],"issn-type":[{"value":"0018-8646","type":"print"},{"value":"0018-8646","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,7,1]]}}}