{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,7]],"date-time":"2024-08-07T23:40:02Z","timestamp":1723074002437},"reference-count":0,"publisher":"Wiley","issue":"3-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":1826,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1995,1]]},"abstract":"<jats:p>During the last decade, many different approaches have been proposed to solve the multiple\u2010level synthesis problem with\ndifferent minimum functionally complete systems of primitive logic blocks. The most popular of them is the division\u2010based\napproach. However, modem microelectronic technology provides a large variety of building blocks which considerably\ndiffer from those typically considered. The traditional methods are therefore not suitable for synthesis with many modem\nbuilding blocks. Furthermore, they often fail to find global optima for complex designs and leave unconsidered some\nimportant design aspects. Some of their weaknesses can be eliminated without leaving the paradigm they are based on, other\nones are more fundamental. A paradigm which enables efficient exploitation of the opportunities created by the\nmicroelectronic technology is the general decomposition paradigm. The aim of this paper is to analyze and compare the\ngeneral decomposition approach and the division\u2010based approach. The most important advantages of the general\ndecomposition approach are its generality (any network of any building blocks can be considered) and totality (all important\ndesign aspects can be considered) as well as handling the incompletely specified functions in a natural way. In many cases,\nthe general decomposition approach gives much better results than the traditional approaches.<\/jats:p>","DOI":"10.1155\/1995\/19823","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:56:46Z","timestamp":1190120206000},"page":"267-287","source":"Crossref","is-referenced-by-count":11,"title":["Division\u2010Based Versus General Decomposition\u2010Based Multiple\u2010Level Logic Synthesis"],"prefix":"10.1155","volume":"3","author":[{"given":"Frank","family":"Volf","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Lech","family":"J\u00f3\u017awiak","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Mario","family":"Stevens","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[1995,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1995\/019823.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1995\/19823","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,7]],"date-time":"2024-08-07T22:39:42Z","timestamp":1723070382000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1995\/19823"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,1]]},"references-count":0,"journal-issue":{"issue":"3-4","published-print":{"date-parts":[[1995,1]]}},"alternative-id":["10.1155\/1995\/19823"],"URL":"https:\/\/doi.org\/10.1155\/1995\/19823","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1995,1]]}}}