{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,3,24]],"date-time":"2025-03-24T06:55:16Z","timestamp":1742799316384},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":730,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"funder":[{"DOI":"10.13039\/501100001868","name":"National Science Council","doi-asserted-by":"publisher","award":["NSC86-2112-M-007-001"],"award-info":[{"award-number":["NSC86-2112-M-007-001"]}],"id":[{"id":"10.13039\/501100001868","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000006","name":"Office of Naval Research","doi-asserted-by":"publisher","award":["N00014-92-J-1845"],"award-info":[{"award-number":["N00014-92-J-1845"]}],"id":[{"id":"10.13039\/100000006","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>Advanced MOSFET for ULSI and novel silicon\u2010based devices require the use of ultrathin\ntunneling oxides where non\u2010uniformity is often present. We report on our\ntheoretical study of how tunneling properties of ultra\u2010thin oxides are affected by\nroughness at the silicon\/oxide interface. The effect of rough interfacial topography is\naccounted for by using the Planar Supercell Stack Method (PSSM) which can accurately\nand efficiently compute scattering properties of 3D supercell structures. Our results\nindicate that while interface roughness effects can be substantial in the direct tunneling\nregime, they are less important in the Fowler\u2010Nordheim regime.<\/jats:p>","DOI":"10.1155\/1998\/23567","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:58:07Z","timestamp":1190120287000},"page":"47-51","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Interface Roughness Effects in Ultra\u2010Thin Tunneling Oxides"],"prefix":"10.1155","volume":"8","author":[{"given":"D. Z.-Y.","family":"Ting","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Erik S.","family":"Daniel","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"T. C.","family":"Mcgill","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[1998,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/023567.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/23567","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T10:01:46Z","timestamp":1723197706000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/23567"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/23567"],"URL":"https:\/\/doi.org\/10.1155\/1998\/23567","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1998,1]]},"assertion":[{"value":"1998-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}