{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,6,6]],"date-time":"2025-06-06T09:08:57Z","timestamp":1749200937201},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":730,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>Electron transport in quantum devices is governed by discrete quantum states due to electron\nconfinement. A crucial requirement for the modeling of quantum devices is the the numerical\nidentification and resolution of these quantum states. We present an algorithm utilized in our\ngeneral purpose quantum device simulator (NEMO), where we locate the resonances of the\nsystem first and then generate the optimized grid used to integrate over the resonances. We\nfind this algorithm important in the modeling of coherent transport involving ultrafine resonances\nand crucial for the modeling of incoherent transport.<\/jats:p>","DOI":"10.1155\/1998\/43043","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:57:27Z","timestamp":1190120247000},"page":"107-110","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":12,"title":["Resolution of Resonances in a General Purpose Quantum Device Simulator (NEMO)"],"prefix":"10.1155","volume":"6","author":[{"given":"Gerhard","family":"Klimeck","sequence":"first","affiliation":[]},{"given":"Roger K.","family":"Lake","sequence":"additional","affiliation":[]},{"given":"R. Chris","family":"Bowen","sequence":"additional","affiliation":[]},{"given":"Chenjing L.","family":"Fernando","sequence":"additional","affiliation":[]},{"given":"William R.","family":"Frensley","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[1998,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/043043.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/43043","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T11:32:44Z","timestamp":1723203164000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/43043"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/43043"],"URL":"https:\/\/doi.org\/10.1155\/1998\/43043","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1998,1]]},"assertion":[{"value":"1998-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}