{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T12:10:01Z","timestamp":1723205401686},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":730,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>The complex recess and gate shape of modem compound FETs greatly affect the device parasitics\nand therefore impose the need for proper description of the device geometry and surface\nconditions in any practical device simulations. In this paper we describe a new Monte Carlo\n(MC) module incorporated in our Heterojunction 2D Finite element FET simulator H2F [1].\nThe module combines realistic quadrilateral finite\u2010element description of the device geometry\nwith realistic particle simulation of the non\u2010equilibrium hot carrier transport in short\nrecess gate compound FETs. A Single Programme Multiple Data (SPMD) parallel approach\nmakes it possible to use our MC simulator for practical design work, generating the necessary\nI\u2010V characteristics in parallel. The capabilities of the finite element MC module are illustrated\nin example simulations of a 200nm pseudomorphic HEMT fabricated in the Nanoelectronics\nResearch Centre of Glasgow University.<\/jats:p>","DOI":"10.1155\/1998\/51378","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:57:27Z","timestamp":1190120247000},"page":"127-130","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Quadrilateral Finite Element Monte Carlo Simulation of Complex Shape Compound FETs"],"prefix":"10.1155","volume":"6","author":[{"given":"S.","family":"Babiker","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"A.","family":"Asenov","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. R.","family":"Barker","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"S. P.","family":"Beaumont","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[1998,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/051378.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/51378","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T11:31:54Z","timestamp":1723203114000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/51378"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/51378"],"URL":"https:\/\/doi.org\/10.1155\/1998\/51378","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1998,1]]},"assertion":[{"value":"1998-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}