{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T00:02:18Z","timestamp":1723075338680},"reference-count":0,"publisher":"Wiley","issue":"4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":1534,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>In a previous paper [1], we derived formulae for estimating the storage requirements of\nthe Rectangular and L\u2010shaped Corner Stitching data structures [2, 3] for a given layout.\nThese formulae require the computation of quantities called violations, which are\ngeometric properties of the layout. In this paper, we present optimal <jats:italic>\u0398<\/jats:italic>(<jats:italic>n<\/jats:italic> log <jats:italic>n<\/jats:italic>)\nalgorithms for computing violations, where <jats:italic>n<\/jats:italic> is the number of rectangles in the layout.\nThese algorithms are incorporated into a software tool called CLOTH MEASURE.\nExperiments conducted with CLOTH MEASURE show that it is a viable tool for\nestimating the memory requirements of a layout without having to implement the\ncorner stitching data structures, which is a tedious and time\u2010consuming task.<\/jats:p>","DOI":"10.1155\/1998\/64716","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:57:36Z","timestamp":1190120256000},"page":"425-436","source":"Crossref","is-referenced-by-count":0,"title":["CLOTH MEASURE: A Software Tool for Estimating the Memory Requirements of Corner Stitching Data Structures"],"prefix":"10.1155","volume":"7","author":[{"given":"Dinesh P.","family":"Mehta","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[1995,10,20]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/064716.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/vlsi\/1998\/064716.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/64716","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,7]],"date-time":"2024-08-07T23:01:50Z","timestamp":1723071710000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/64716"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1995,10,20]]},"references-count":0,"journal-issue":{"issue":"4","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/64716"],"URL":"https:\/\/doi.org\/10.1155\/1998\/64716","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1995,10,20]]}}}