{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T12:10:02Z","timestamp":1723205402504},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":730,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>This paper presents a numerical study of single\u2010electron resonant tunnelling (RT) assisted by\na few ionised donors in a laterally\u2010confined resonant tunnelling diode (LCRTD). The 3D\nmulti\u2010mode S\u2010matrix simulation is performed newly introducing the scattering potential of\ndiscrete impurities. With a few ionised donors being placed, the calculated energy\u2010dependence\nof the total transmission rate shows new resonances which are donor\u2010configuration\ndependent. Visualised electron probability density reveals that these resonances originate in\nRT via single\u2010donor\u2010induced localised states. The I\u2010V characteristics show current steps of\norder 0.1 nA per donor before the main current peak, which is quantitatively in good agreement\nwith the experimental results.<\/jats:p>","DOI":"10.1155\/1998\/85748","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:57:27Z","timestamp":1190120247000},"page":"103-106","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":0,"title":["Three\u2010Dimensional S\u2010Matrix Simulation ofSingle\u2010Electron Resonant Tunnelling Through RandomIonised Donor States"],"prefix":"10.1155","volume":"6","author":[{"given":"Hiroshi","family":"Mizuta","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[1998,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/085748.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/85748","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T11:34:02Z","timestamp":1723203242000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/85748"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/85748"],"URL":"https:\/\/doi.org\/10.1155\/1998\/85748","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1998,1]]},"assertion":[{"value":"1998-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}