{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,24]],"date-time":"2025-10-24T16:31:54Z","timestamp":1761323514858},"reference-count":0,"publisher":"Wiley","issue":"3","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":730,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>A new approach for power analysis of microprocessors has recently been proposed [14].\nThe idea is to look at the power consumption in a microprocessor from the point of view\nof the actual software executing on the processor. The basic component of this approach\nis a measurement based, instruction\u2010level power analysis technique. The technique\nallows for the development of an instruction\u2010level power model for the given processor,\nwhich can be used to evaluate software in terms of the power consumption, and for\nexploring the optimization of software for lower power. This paper describes the\napplication of this technique for a comprehensive instruction\u2010level power analysis of a\ncommercial 32\u2010bit RISC\u2010based embedded microcontroller. The salient results of the\nanalysis and the basic instruction\u2010level power model are described. Interesting\nobservations and insights based on the results are also presented. Such an\ninstruction\u2010level power analysis can provide cues as to what optimizations in the\nmicro\u2010architecture design of the processor would lead to the most effective power\nsavings in actual software applications. Wherever the results indicate such optimizations,\nthey have been discussed. Furthermore, ideas for low power software design, as\nsuggested by the results, are described in this paper as well.<\/jats:p>","DOI":"10.1155\/1998\/89432","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:57:36Z","timestamp":1190120256000},"page":"225-242","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":21,"title":["Power Analysis of a 32\u2010bit Embedded Microcontroller"],"prefix":"10.1155","volume":"7","author":[{"given":"Vivek","family":"Tiwari","sequence":"first","affiliation":[]},{"given":"Mike Tien-Chien","family":"Lee","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[1998,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/089432.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/89432","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,7]],"date-time":"2024-08-07T22:53:55Z","timestamp":1723071235000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/89432"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,1]]},"references-count":0,"journal-issue":{"issue":"3","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/89432"],"URL":"https:\/\/doi.org\/10.1155\/1998\/89432","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1998,1]]},"assertion":[{"value":"1998-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}