{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T12:10:03Z","timestamp":1723205403119},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":730,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"funder":[{"name":"NATO Collaborative Research","award":["950753"],"award-info":[{"award-number":["950753"]}]}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[1998,1]]},"abstract":"<jats:p>We have studied the capacitance between two parallel plates enclosing a quantum confined\nsystem and its dependence on the applied voltage. The concepts of capacitance and differential\ncapacitance are discussed together with their applicability to systems characterized by\nsingle.electron tunneling. We determine the tunneling thresholds by means of a formalism\nbased on the minimization of the system free energy and we retrieve, as a special case,\nLuryi\u2032s quantum capacitance formula. We apply our method to the study of an idealized system\nmade up of a number of quantum dots with random size distributed according to a gaussian.\nResults are shown for different choices of the position of the dots between the plates and\nof the voltage span applied to perform the measurement of the differential capacitance.<\/jats:p>","DOI":"10.1155\/1998\/92921","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:57:27Z","timestamp":1190120247000},"page":"345-349","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Corrections to the Capacitance between Two ElectrodesDue to the Presence of Quantum Confined System"],"prefix":"10.1155","volume":"6","author":[{"given":"M.","family":"Macucci","sequence":"first","affiliation":[]},{"given":"K.","family":"Hess","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[1998,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/1998\/092921.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/1998\/92921","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T11:32:31Z","timestamp":1723203151000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/1998\/92921"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[1998,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[1998,1]]}},"alternative-id":["10.1155\/1998\/92921"],"URL":"https:\/\/doi.org\/10.1155\/1998\/92921","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[1998,1]]},"assertion":[{"value":"1998-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}