{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T14:10:08Z","timestamp":1723212608401},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2001,1]]},"abstract":"<jats:p>Monte Carlo simulations of electron motion in GaAs\/A1As superlattices with narrow\nmini\u2010band width are performed to investigate the effect of a strong magnetic field on\nminiband conduction. In the quantum limit at low temperatures when the cyclotron\nenergy exceeds the miniband width, the miniband conduction is found to exhibit a\nstrong suppression. This results from the quasi\u2010one\u2010dimensional states formed in the\nquantum limit and the restricted range of the scattering processes available to the\nconduction electrons. A small shoulder on the lower electric field side of the main peak\nis also found in marked contrast with Esaki\u2010Tsu and Ignatov models.<\/jats:p>","DOI":"10.1155\/2001\/24258","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T13:00:57Z","timestamp":1190120457000},"page":"45-50","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":3,"title":["Numerical Studies of Miniband Conductionin Quasi\u2010One\u2010Dimensional Superlattices"],"prefix":"10.1155","volume":"13","author":[{"given":"N.","family":"Mori","sequence":"first","affiliation":[]},{"given":"C.","family":"Hamaguchi","sequence":"additional","affiliation":[]},{"given":"L.","family":"Eaves","sequence":"additional","affiliation":[]},{"given":"P. C.","family":"Main","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2001,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2001\/024258.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/2001\/24258","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T13:33:54Z","timestamp":1723210434000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/2001\/24258"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[2001,1]]}},"alternative-id":["10.1155\/2001\/24258"],"URL":"https:\/\/doi.org\/10.1155\/2001\/24258","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[2001,1]]},"assertion":[{"value":"2001-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}