{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T14:10:07Z","timestamp":1723212607367},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"funder":[{"name":"Microelectronics Research Lab","award":["MDA 904-97-1-0113"],"award-info":[{"award-number":["MDA 904-97-1-0113"]}]}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2001,1]]},"abstract":"<jats:p>Focused Ion Beam MOSFETs (FIBMOS) demonstrate large enhancements in core device\nperformance areas such as output resistance, hot electron reliability and voltage stability\nupon channel length or drain voltage variation. In this work, we describe an optimization\ntechnique for FIBMOS threshold voltage characterization using the 2D Silvaco ATLAS\nsimulator. Both ATLAS and 2D Monte Carlo particle\u2010based simulations were used to\nshow that FIBMOS devices exhibit enhanced current drive capabilities when compared to\nnormal MOSFETs. It was also found that the device performance is very much dependent\nupon the FIB implant profile. High and narrow doping of the FIB implant leads to high\ndrain current and low hot carrier reliability, whereas low and wide doping gives rise to\nlower drain current and higher hot carrier reliability.<\/jats:p>","DOI":"10.1155\/2001\/45747","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T13:00:57Z","timestamp":1190120457000},"page":"251-256","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Optimization of FIBMOS Through 2D SilvacoATLAS and 2D Monte Carlo Particle\u2010basedDevice Simulations"],"prefix":"10.1155","volume":"13","author":[{"given":"J.","family":"Kang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"X.","family":"He","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D.","family":"Vasileska","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"D. K.","family":"Schroder","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2001,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2001\/045747.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/2001\/45747","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T13:33:31Z","timestamp":1723210411000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/2001\/45747"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[2001,1]]}},"alternative-id":["10.1155\/2001\/45747"],"URL":"https:\/\/doi.org\/10.1155\/2001\/45747","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[2001,1]]},"assertion":[{"value":"2001-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}