{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T02:40:02Z","timestamp":1723084802680},"reference-count":0,"publisher":"Wiley","issue":"3","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"funder":[{"name":"EPSRC\/MoD Powerpack Project","award":["GR\/L27930"],"award-info":[{"award-number":["GR\/L27930"]}]}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2001,1]]},"abstract":"<jats:p>Current mobile phone applications demand high performance from the DSP, and future\ngenerations are likely to require even greater throughput. However, it is important to\nbalance these processing demands against the requirement of low power consumption\nfor extended battery lifetime. A novel low\u2010power digital signal processor (DSP)\narchitecture CADRE (Configurable Asynchronous DSP for Reduced Energy) addresses\nthese requirements through a multi\u2010level power reduction strategy. A parallel architecture\nand configurable compressed instruction set meets the throughput requirements\nwithout excessive program memory bandwidth, while a large register file reduces the\ncost of data accesses. Sign\u2010magnitude representation is used for data, to reduce switching\nactivity within the datapath. Asynchronous design gives fine\u2010grained activity control\nwithout the complexities of clock gating, and gives low electromagnetic interference.\nFinally, the operational model of the target application allows for a reduced interrupt\nstructure, simplifying processor design by avoiding the need for exact exceptions.<\/jats:p>","DOI":"10.1155\/2001\/47640","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:59:02Z","timestamp":1190120342000},"page":"333-348","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":5,"title":["CADRE: A Low\u2010power, Low\u2010EMI DSP Architecture for Digital Mobile Phones"],"prefix":"10.1155","volume":"12","author":[{"given":"Mike","family":"Lewis","sequence":"first","affiliation":[]},{"given":"Linda","family":"Brackenbury","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2000,8,3]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2001\/047640.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/2001\/47640","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T01:44:34Z","timestamp":1723081474000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/2001\/47640"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000,8,3]]},"references-count":0,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2001,1]]}},"alternative-id":["10.1155\/2001\/47640"],"URL":"https:\/\/doi.org\/10.1155\/2001\/47640","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[2000,8,3]]},"assertion":[{"value":"2000-06-20","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2000-08-03","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}