{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T14:10:02Z","timestamp":1723212602693},"reference-count":0,"publisher":"Wiley","issue":"1-4","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"funder":[{"DOI":"10.13039\/501100000266","name":"Engineering and Physical Sciences Research Council","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100000266","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2001,1]]},"abstract":"<jats:p>This paper presents the spatial distribution of hot electrons along the channel of a\n0.35 micron MOSFET using the full band pseudopotential Monte Carlo simulator\nDAMOCLES. The important aspect of this investigation is the implementation of a\nrigorous statistical enhancement technique along the channel of the device, to probe the\nhot electrons generated along the channel. Simulations have been carried out for different\nbias points. The results clearly show that the probability of generating electrons with\nenergies sufficient for injection into the oxide layer is significant only at the drain side of\nthe device. It is also observed that the peak gate current occurs exactly just inside the\nLDD region coincident with the position of maximum lateral electric field.<\/jats:p>","DOI":"10.1155\/2001\/61328","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T13:00:57Z","timestamp":1190120457000},"page":"301-304","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":2,"title":["Monte Carlo Study of the Lateral Distributionof Gate Current Density Along the Channelof Submicron LDD MOSFET\u2032s"],"prefix":"10.1155","volume":"13","author":[{"given":"A.","family":"Harkar","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"R. W.","family":"Kelsall","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"J. N.","family":"Ellis","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"311","published-online":{"date-parts":[[2001,1]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2001\/061328.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/2001\/61328","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,9]],"date-time":"2024-08-09T13:33:33Z","timestamp":1723210413000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/2001\/61328"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2001,1]]},"references-count":0,"journal-issue":{"issue":"1-4","published-print":{"date-parts":[[2001,1]]}},"alternative-id":["10.1155\/2001\/61328"],"URL":"https:\/\/doi.org\/10.1155\/2001\/61328","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[2001,1]]},"assertion":[{"value":"2001-01-01","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}