{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T02:40:02Z","timestamp":1723084802809},"reference-count":0,"publisher":"Wiley","issue":"3","license":[{"start":{"date-parts":[[2000,1,1]],"date-time":"2000-01-01T00:00:00Z","timestamp":946684800000},"content-version":"vor","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":["onlinelibrary.wiley.com"],"crossmark-restriction":true},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2001,1]]},"abstract":"<jats:p>Novel low\u2010power circuits based on low swing voltage technique, in the internal nodes of\nbus architectures, are proposed. Different classes of driver\/receiver and repeater circuits\nare presented. They are implemented on conventional CMOS technology. The proposed\ntechnique is based on inserting a variable number of MOSFET transistors in the driver\ncircuits, causing variable low swing voltage levels in the output of the driver circuits. In\norder to re\u2010pull up the low swing voltage to full swing, innovated high\u2010speed, crosscoupled\nlatch voltage receiver circuits are proposed. In applications having high load\ncapacitance due to long interconnections, novel repeater circuits, based also on low\nswing voltage technique, are introduced. The difference between the values of threshold\nvoltage of the nMOS transistor and the pMOS transistors is exploited to decrease the\npower dissipation. The effect of the proposed technique in noise margins is also analysed.<\/jats:p>","DOI":"10.1155\/2001\/63230","type":"journal-article","created":{"date-parts":[[2007,9,18]],"date-time":"2007-09-18T12:59:02Z","timestamp":1190120342000},"page":"415-429","update-policy":"http:\/\/dx.doi.org\/10.1002\/crossmark_policy","source":"Crossref","is-referenced-by-count":1,"title":["Efficient Low Power\/Low Swing Bus Design Architectures"],"prefix":"10.1155","volume":"12","author":[{"given":"Abdoul","family":"Rjoub","sequence":"first","affiliation":[]},{"given":"Odysseas","family":"Koufopavlou","sequence":"additional","affiliation":[]}],"member":"311","published-online":{"date-parts":[[2000,8,3]]},"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2001\/063230.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/pdf\/10.1155\/2001\/63230","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,8,8]],"date-time":"2024-08-08T01:44:35Z","timestamp":1723081475000},"score":1,"resource":{"primary":{"URL":"https:\/\/onlinelibrary.wiley.com\/doi\/10.1155\/2001\/63230"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2000,8,3]]},"references-count":0,"journal-issue":{"issue":"3","published-print":{"date-parts":[[2001,1]]}},"alternative-id":["10.1155\/2001\/63230"],"URL":"https:\/\/doi.org\/10.1155\/2001\/63230","archive":["Portico"],"relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"type":"print","value":"1065-514X"},{"type":"electronic","value":"1563-5171"}],"subject":[],"published":{"date-parts":[[2000,8,3]]},"assertion":[{"value":"2000-06-20","order":0,"name":"received","label":"Received","group":{"name":"publication_history","label":"Publication History"}},{"value":"2000-08-03","order":3,"name":"published","label":"Published","group":{"name":"publication_history","label":"Publication History"}}]}}