{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,30]],"date-time":"2022-03-30T22:03:38Z","timestamp":1648677818673},"reference-count":4,"publisher":"Hindawi Limited","license":[{"start":{"date-parts":[[2008,1,1]],"date-time":"2008-01-01T00:00:00Z","timestamp":1199145600000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["International Journal of Reconfigurable Computing"],"published-print":{"date-parts":[[2008]]},"abstract":"<jats:p>Transaction-level modeling (TLM) is a promising technique to deal with the increasing complexity of modern embedded systems. This model allows a system designer to model a complete application, composed of hardware and software parts, at several levels of abstraction. For this purpose, we use systemC, which is proposed as a standardized modeling language. This paper presents a transaction-level modeling cosimulation methodology for modeling, validating, and verifying our embedded open architecture platform. The proposed platform is an open source multiprocessor system-on-chip (MPSoC) platform, integrated under the synthesis tool for adaptive and reconfigurable system-on-chip (STARSoC) environment. It relies on the integration between an open source instruction set simulators (ISSs), OR1Ksim platform, and the systemC simulation environment which contains other components (wishbone bus, memories, , etc.). The aim of this work is to provide designers with the possibility of faster and efficient architecture exploration at a higher level of abstractions, starting from an algorithmic description to implementation details.<\/jats:p>","DOI":"10.1155\/2008\/902653","type":"journal-article","created":{"date-parts":[[2008,9,29]],"date-time":"2008-09-29T09:30:02Z","timestamp":1222680602000},"page":"1-10","source":"Crossref","is-referenced-by-count":0,"title":["SystemC Transaction-Level Modeling of an MPSoC Platform Based on an Open Source ISS by Using Interprocess Communication"],"prefix":"10.1155","volume":"2008","author":[{"given":"Sami","family":"Boukhechem","sequence":"first","affiliation":[{"name":"UMR CNRS 5158, University of Burgundy, 9 Avenue Alain Savary B.P: 47870, 21078 Dijon Cedex, France"}]},{"given":"El-Bay","family":"Bourennane","sequence":"additional","affiliation":[{"name":"UMR CNRS 5158, University of Burgundy, 9 Avenue Alain Savary B.P: 47870, 21078 Dijon Cedex, France"}]}],"member":"98","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.878259"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1007\/s11265-005-6648-1"},{"key":"11","year":"1998"},{"key":"19","year":"2003"}],"container-title":["International Journal of Reconfigurable Computing"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2008\/902653.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2008\/902653.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/journals\/ijrc\/2008\/902653.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2016,8,11]],"date-time":"2016-08-11T13:53:32Z","timestamp":1470923612000},"score":1,"resource":{"primary":{"URL":"http:\/\/www.hindawi.com\/journals\/ijrc\/2008\/902653\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008]]},"references-count":4,"alternative-id":["902653","902653"],"URL":"https:\/\/doi.org\/10.1155\/2008\/902653","relation":{},"ISSN":["1687-7195","1687-7209"],"issn-type":[{"value":"1687-7195","type":"print"},{"value":"1687-7209","type":"electronic"}],"subject":[],"published":{"date-parts":[[2008]]}}}