{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,3]],"date-time":"2022-04-03T07:01:21Z","timestamp":1648969281318},"reference-count":18,"publisher":"Hindawi Limited","license":[{"start":{"date-parts":[[2009,9,6]],"date-time":"2009-09-06T00:00:00Z","timestamp":1252195200000},"content-version":"unspecified","delay-in-days":0,"URL":"http:\/\/creativecommons.org\/licenses\/by\/3.0\/"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["VLSI Design"],"published-print":{"date-parts":[[2009,9,6]]},"abstract":"<jats:p>As the semiconductor technology advances, interconnect plays a more and more important role in power consumption in VLSI systems. This also imposes a challenge in high-level synthesis, in which physical information is limited and conventionally considered after high-level synthesis. To close the gap between high-level synthesis and physical implementation, integration of physical synthesis and high-level synthesis is essential. In this paper, a technique named FloM is proposed for integrating floorplanning into high-level synthesis of VLSI system with multivoltage datapath. Experimental results obtained show that the proposed technique is effective and the energy consumed by both the datapath and the wires can be reduced by more than 40%.<\/jats:p>","DOI":"10.1155\/2009\/156751","type":"journal-article","created":{"date-parts":[[2009,9,7]],"date-time":"2009-09-07T12:17:07Z","timestamp":1252325827000},"page":"1-10","source":"Crossref","is-referenced-by-count":1,"title":["Floorplan-Driven Multivoltage High-Level Synthesis"],"prefix":"10.1155","volume":"2009","author":[{"given":"Xianwu","family":"Xing","sequence":"first","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"}]},{"given":"Ching Chuen","family":"Jong","sequence":"additional","affiliation":[{"name":"School of Electrical and Electronic Engineering, Nanyang Technological University, Singapore 639798"}]}],"member":"98","reference":[{"key":"1","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.842820"},{"key":"2","doi-asserted-by":"publisher","DOI":"10.1109\/4.293111"},{"key":"3","doi-asserted-by":"publisher","DOI":"10.1109\/43.59070"},{"key":"4","doi-asserted-by":"publisher","DOI":"10.1109\/43.137515"},{"issue":"4","key":"5","doi-asserted-by":"crossref","first-page":"312","DOI":"10.1145\/268424.268425","volume":"2","year":"1997","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"key":"7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2005.853618"},{"key":"10","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.834235"},{"key":"23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.895780"},{"key":"11","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2007.03.001"},{"issue":"3","key":"12","doi-asserted-by":"crossref","first-page":"227","DOI":"10.1145\/264995.264997","volume":"2","year":"1997","journal-title":"ACM Transactions on Design Automation of Electronic Systems"},{"issue":"4","key":"13","doi-asserted-by":"crossref","first-page":"436","DOI":"10.1109\/92.645070","volume":"5","year":"1997","journal-title":"IEEE Transactions on Very Large Scale Integration (VLSI) Systems"},{"key":"14","doi-asserted-by":"publisher","DOI":"10.1109\/92.988725"},{"key":"15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2005.849131"},{"key":"16","year":"1999"},{"key":"17","doi-asserted-by":"publisher","DOI":"10.1109\/43.908471"},{"key":"18","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.858266"},{"issue":"3","key":"19","doi-asserted-by":"crossref","first-page":"463","DOI":"10.1109\/4.661212","volume":"33","year":"1998","journal-title":"IEEE Journal of Solid-State Circuits"},{"key":"22","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.827568"}],"container-title":["VLSI Design"],"original-title":[],"language":"en","link":[{"URL":"http:\/\/downloads.hindawi.com\/archive\/2009\/156751.pdf","content-type":"application\/pdf","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2009\/156751.xml","content-type":"application\/xml","content-version":"vor","intended-application":"text-mining"},{"URL":"http:\/\/downloads.hindawi.com\/archive\/2009\/156751.pdf","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2020,12,8]],"date-time":"2020-12-08T19:58:57Z","timestamp":1607457537000},"score":1,"resource":{"primary":{"URL":"https:\/\/www.hindawi.com\/journals\/vlsi\/2009\/156751\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,9,6]]},"references-count":18,"alternative-id":["156751","156751"],"URL":"https:\/\/doi.org\/10.1155\/2009\/156751","relation":{},"ISSN":["1065-514X","1563-5171"],"issn-type":[{"value":"1065-514X","type":"print"},{"value":"1563-5171","type":"electronic"}],"subject":[],"published":{"date-parts":[[2009,9,6]]}}}